Yu Lee

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	2012
c4		Ai-Jia Chuang, Yu Lee, Ching-Yuan Yang: A chip-to-chip clock-deskewing circuit for 3-D ICs. ISCAS 2012: 1652-1655
	2010
c3		Yu Lee, Ching-Yuan Yang, Nai-Chen Daniel Cheng, Ji-Jan Chen: An embedded wide-range and high-resolution CLOCK jitter measurement circuit. DATE 2010: 1637-1640
	2009
c2		Yu Lee, Moon-Ryul Jung: Retargeting Motion of Clothing to New Characters. GRAPP 2009: 280-285
	2008
j2		Ching-Yuan Yang, Yu Lee: A PWM and PAM Signaling Hybrid Technology for Serial-Link Transceivers. IEEE T. Instrumentation and Measurement 57(5): 1058-1070 (2008)
	2006
j1		Ching-Yuan Yang, Yu Lee, Cheng-Hsing Lee: A CMOS Clock and Data Recovery Circuit with a Half-Rate Three-State Phase Detector. IEICE Transactions 89-C(6): 746-752 (2006)
	2005
c1		Ching-Yuan Yang, Yu Lee: A 0.18-µm CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniques. ISCAS (2) 2005: 1150-1153

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