Jean-Didier Legat

David Bol, Julien De Vos, Cédric Hocquet, François Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat: SleepWalker: A 25-MHz 0.4-V Sub-mm² 7-µW/MHz Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes. J. Solid-State Circuits 48(1): 20-32 (2013)

Angelo Kuti Lusala, Jean-Didier Legat: Combining SDM-Based Circuit Switching with Packet Switching in a Router for On-Chip Networks. Int. J. Reconfig. Comp. 2012 (2012)

Angelo Kuti Lusala, Jean-Didier Legat: A SDM-TDM-Based Circuit-Switched Router for On-Chip Networks. TRETS 5(3): 15 (2012)

David Bol, Julien De Vos, Cédric Hocquet, François Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat: A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes. ISSCC 2012: 490-492

Renaud Van Langendonck, Angelo Kuti Lusala, Jean-Didier Legat: MPSoCDK: A framework for prototyping and validating MPSoC projects on FPGAs. ReCoSoC 2012: 1-8

Cédric Hocquet, Dina Kamel, Francesco Regazzoni, Jean-Didier Legat, Denis Flandre, David Bol, François-Xavier Standaert: Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags. J. Cryptographic Engineering 1(1): 79-86 (2011)

Angelo Kuti Lusala, Jean-Didier Legat: Combining sdm-based circuit switching with packet switching in a NoC for real-time applications. ISCAS 2011: 2505-2508

Angelo Kuti Lusala, Jean-Didier Legat: A SDM-TDM based circuit-switched router for on-chip networks. ReCoSoC 2011: 1-8

Daniel Vergeylen, Angelo Kuti Lusala, Jean-Didier Legat: A new mechanism to reduce congestion on TDM networks-on-chips. ReCoSoC 2011: 1-8

Ilham Hassoune, Denis Flandre, Ian O'Connor, Jean-Didier Legat: ULPFA: A New Efficient Design of a Power-Aware Full Adder. IEEE Trans. on Circuits and Systems 57-I(8): 2066-2074 (2010)

David Bol, Denis Flandre, Jean-Didier Legat: Nanometer MOSFET Effects on the Minimum-Energy Point of Sub-45nm Subthreshold Logic---Mitigation at Technology and Circuit Levels. ACM Trans. Design Autom. Electr. Syst. 16(1): 2 (2010)

Bertrand Rousseau, Philippe Manet, Igor Loiselle, Jean-Didier Legat, Hans Vandierendonck: A methodology for precise comparisons of processor core architectures for homogeneous many-core DSP platforms. DASIP 2010: 273-280

David Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat: Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits. ISCAS 2010: 1484-1487

Angelo Kuti Lusala, Jean-Didier Legat: Combining circuit and packet switching with bus architecture in a NoC for real-time applications. ISCAS 2010: 2880-2883

Angelo Kuti Lusala, Jean-Didier Legat: A Hybrid Router Combining SDM-Based Circuit Swictching with Packet Switching for On-chip Networks. ReConFig 2010: 340-345

David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat: Interests and Limitations of Technology Scaling for Subthreshold Logic. IEEE Trans. VLSI Syst. 17(10): 1508-1519 (2009)

David Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat: Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic. ISLPED 2009: 3-8

David Bol, Denis Flandre, Jean-Didier Legat: Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits. ISLPED 2009: 21-26

Lotfi Guedria, Damien Hubaux, Mathieu Ocãna, Jean-Didier Legat: Flexible embedded system for sensor integration and custom data processing in an automotive application. IWCMC 2009: 1304-1309

Philippe Manet, Daniel Maufroid, Leonardo Tosi, Grégory Gailliard, Olivier Mulertt, Marco Di Ciano, Jean-Didier Legat, Denis Aulagnier, Christian Gamrat, Raffaele Liberati, Vincenzo La Barba, Pol Cuvelier, Bertrand Rousseau, Paul Gelineau: An Evaluation of Dynamic Partial Reconfiguration for Signal and Image Processing in Professional Electronics Applications. EURASIP J. Emb. Sys. 2008 (2008)

David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat: Analysis and minimization of practical energy in 45nm subthreshold logic circuits. ICCD 2008: 294-300

David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat: Impact of Technology Scaling on Digital Subthreshold Circuits. ISVLSI 2008: 179-184

Ilham Hassoune, François Macé, Denis Flandre, Jean-Didier Legat: Dynamic differential self-timed logic families for robust and low-power security ICs. Integration 40(3): 355-364 (2007)

David Bol, Ilham Hassoune, David Levacq, Denis Flandre, Jean-Didier Legat: Efficient Multiple-Valued Signed-Digit Full Adder Based on NDR MOS Structures and its Application to an N-bit Current-Mode Constant-Time Adder. Multiple-Valued Logic and Soft Computing 13(1-2): 61-78 (2007)

Hans Vandierendonck, Philippe Manet, Thibault Delavallee, Igor Loiselle, Jean-Didier Legat: By-passing the out-of-order execution pipeline to increase energy-efficiency. Conf. Computing Frontiers 2007: 97-104

Bertrand Rousseau, Philippe Manet, D. Galerin, D. Merkenbreack, Jean-Didier Legat, F. Dedeken, Yves Gabriel: Enabling certification for dynamic partial reconfiguration using a minimal flow. DATE 2007: 983-988

Philippe Manet, Daniel Maufroid, Leonardo Tosi, Marco Di Ciano, Olivier Mulertt, Yves Gabriel, Jean-Didier Legat, Denis Aulagnier, Christian Gamrat, Raffaele Liberati, Vincenzo La Barba: Interactive presentation: RECOPS: reconfiguring programmable devices for military hardware electronics. DATE 2007: 994-999

Angelo Kuti Lusala, Philippe Manet, Bertrand Rousseau, Jean-Didier Legat: NoC Implementation in FPGA Using Torus Topology. FPL 2007: 778-781

Philippe Manet, Renaud Ambroise, David Bol, Marc Baltus, Jean-Didier Legat: Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications. J. Low Power Electronics 2(1): 95-104 (2006)

Ilham Hassoune, François Macé, Denis Flandre, Jean-Didier Legat: Low-swing current mode logic (LSCML): A new logic style for secure and robust smart cards against power analysis attacks. Microelectronics Journal 37(9): 997-1006 (2006)

Antonin Descampe, François-Olivier Devaux, Gaël Rouvroy, Jean-Didier Legat, Jean-Jacques Quisquater, Benoit M. Macq: A Flexible Hardware JPEG 2000 Decoder for Digital Cinema. IEEE Trans. Circuits Syst. Video Techn. 16(11): 1397-1410 (2006)

Guerric Meurice de Dormale, Renaud Ambroise, David Bol, Jean-Jacques Quisquater, Jean-Didier Legat: Low-Cost Elliptic Curve Digital Signature Coprocessor for Smart Cards. ASAP 2006: 347-353

Hans Vandierendonck, Philippe Manet, Jean-Didier Legat: Application-specific reconfigurable XOR-indexing to eliminate cache conflict misses. DATE 2006: 357-362

François-Xavier Standaert, Frédéric Lefèbvre, Gaël Rouvroy, Benoit M. Macq, Jean-Jacques Quisquater, Jean-Didier Legat: Practical Evaluation of a Radial Soft Hash Algorithm. ITCC (2) 2005: 89-94

Philippe Manet, David Bol, Renaud Ambroise, Jean-Didier Legat: Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications. PATMOS 2005: 19-29

François Macé, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat: A Design Methodology for Secured ICs Using Dynamic Current Mode Logic. PATMOS 2005: 550-560

Gaël Rouvroy, François-Xavier Standaert, Frédéric Lefèbvre, Jean-Jacques Quisquater, Benoit M. Macq, Jean-Didier Legat: Reconfigurable hardware solutions for the digital rights management of digital cinema. Digital Rights Management Workshop 2004: 40-53

François-Xavier Standaert, Gilles Piret, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat: ICEBERG : An Involutional Cipher Efficient for Block Encryption in Reconfigurable Hardware. FSE 2004: 279-299

Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat: Compact and Efficient Encryption/Decryption Module for FPGA Implementation of the AES Rijndael Very Well Suited for Small Embedded Applications. ITCC (2) 2004: 583-587

Ilham Hassoune, Amaury Nève, Jean-Didier Legat, Denis Flandre: Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell. PATMOS 2004: 189-197

Elias N. Malamas, Euripides G. M. Petrakis, Michalis E. Zervakis, Laurent Petit, Jean-Didier Legat: A survey on industrial vision systems, applications, tools. Image Vision Comput. 21(2): 171-188 (2003)

Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat: Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis. IEEE Trans. Computers 52(4): 473-482 (2003)

Grégory Dillen, Benoît Georis, Olivier Cantineau, Jean-Didier Legat: Combined line-based architecture for the 5-3 and 9-7 wavelet transform of JPEG2000. IEEE Trans. Circuits Syst. Video Techn. 13(9): 944-950 (2003)

François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat: Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs. CHES 2003: 334-350

François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat: A methodology to implement block ciphers in reconfigurable hardware and its application to fast and compact AES RIJNDAEL. FPGA 2003: 216-224

Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat: Design strategies and modified descriptions to optimize cipher FPGA implementations: fast and compact results for DES and triple-DES. FPGA 2003: 247

Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat: Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and Triple-DES. FPL 2003: 181-193

Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat: Efficient FPGA Implementation of Block Cipher MISTY1. IPDPS 2003: 185

François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat: A Time-Memory Tradeoff Using Distinguished Points: New Analysis & FPGA Results. CHES 2002: 593-609

Jean-Jacques Quisquater, François-Xavier Standaert, Gaël Rouvroy, Jean-Pierre David, Jean-Didier Legat: A Cryptanalytic Time-Memory Tradeoff: First FPGA Implementation. FPL 2002: 780-789

François Koeune, Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Pierre David, Jean-Didier Legat: An FPGA Implementation of the Linear Cryptanalysis. FPL 2002: 845-852

Jean-Pierre David, Tony Postiau, Paul Fisette, Jean-Didier Legat: Implementation of very large dataflow graphs on a reconfigurable architecture for robotic applications. IPDPS 2001: 143

Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoit M. Macq: A New Parallelism Management Scheme for Multiprocessor Systems. ACPC 1999: 246-256

Tanguy Gilmont, Jean-Didier Legat, Jean-Jacques Quisquater: Enhancing Security in the Memory Management Unit. EUROMICRO 1999: 1449-

Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoit M. Macq: A Graph-Oriented Task Manager for Small Multiprocessor Systems. Euro-Par 1999: 735-744

C. Amerijckx, Michel Verleysen, Philippe Thissen, Jean-Didier Legat: Image compression by self-organized Kohonen map. IEEE Transactions on Neural Networks 9(3): 503-507 (1998)

Olivier Cantineau, Laurent Petit, Jean-Didier Legat: Architecture of a Memory Manager for an MPEG-2 Video Decoding Circuit. VLSI Signal Processing 20(3): 251-265 (1998)

Olivier Cantineau, Jean-Didier Legat: Efficient Parallelisation of an MPEG-2 Codec on a TMS320C80 Video Processor. ICIP (3) 1998: 977-980

Jean-Pierre David, Jean-Didier Legat: A Data-Flow Oriented Co-Design for Reconfigurable Systems. International Workshop on Rapid System Prototyping 1998: 207-211

Tanguy Gilmont, Xavier Verians, Jean-Didier Legat, Claude Veraart: Resolution reduction by growth of zones for visual prosthesis. ICIP (1) 1996: 299-302

Jean-Luc Voz, Michel Verleysen, Philippe Thissen, Jean-Didier Legat: Suboptimal Bayesian classification by vector quantization with small clusters. ESANN 1995

Jean-Luc Voz, Michel Verleysen, Philippe Thissen, Jean-Didier Legat: A Practical View of Suboptimal Bayesian Classification with Radial Gaussian Kernels. IWANN 1995: 404-411

Philippe Thissen, Michel Verleysen, Jean-Didier Legat, Jordi Madrenas, Jordi Domínguez: A VLSI System for Neural Bayesian and LVQ Classification. IWANN 1995: 696-703

Philippe Thissen, Michel Verleysen, Jean-Didier Legat: An Associative Processor Dedicated to Classification by Neural Methods. IWANN 1995: 704-711

Michel Verleysen, Philippe Thissen, Jean-Didier Legat: Optimal decision surfaces in LVQ1 classiffication of patterns. ESANN 1993

Michel Verleysen, Philippe Thissen, Jean-Didier Legat: Linear Vector Classification: An Improvement on LVQ Algorithms to Create Classes of Patterns. IWANN 1993: 340-345