| 2013 | ||
|---|---|---|
| j19 | Hai Li, Renbiao Wu: An estimation method for InSAR interferometric phase using correlation weight joint subspace projection. EURASIP J. Adv. Sig. Proc. 2013: 27 (2013) | |
| c52 | Jie Guo, Wujie Wen, Yaojun Zhang, Sicheng Li, Hai Li, Yiran Chen: DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems. DATE 2013: 380-385 | |
| c51 | Xiuyuan Bi, Mohamed Anis Weldon, Hai Li: STT-RAM designs supporting dual-port accesses. DATE 2013: 853-858 | |
| 2012 | ||
| j18 | Renbiao Wu, QiongQiong Jia, Hai Li: A novel STAP method for the detection of fast air moving targets from high speed platform. SCIENCE CHINA Information Sciences 55(6): 1259-1269 (2012) | |
| j17 | Wei Wang, Yingguang Li, Hai Li, Changqing Liu: An agent-based collaborative design framework for feature-based design of aircraft structural parts. Int. J. Computer Integrated Manufacturing 25(10): 888-900 (2012) | |
| j16 | Zhenyu Sun, Xiang Chen, Yaojun Zhang, Hai Li, Yiran Chen: Nonvolatile Memories as the Data Storage System for Implantable ECG Recorder. JETC 8(2): 13 (2012) | |
| j15 | Yiran Chen, Hai Li, Xiaobin Wang, Wenzhong Zhu, Wei Xu, Tong Zhang: A 130 nm 1.2 V/3.3 V 16 Kb Spin-Transfer Torque Random Access Memory With Nondestructive Self-Reference Sensing Scheme. J. Solid-State Circuits 47(2): 560-573 (2012) | |
| j14 | Zhenyu Sun, Hai Li, Yiran Chen, Xiaobin Wang: Voltage Driven Nondestructive Self-Reference Sensing Scheme of Spin-Transfer Torque Memory. IEEE Trans. VLSI Syst. 20(11): 2020-2030 (2012) | |
| c50 | ||
| c49 | Xiang Chen, Jian Zheng, Yiran Chen, Wei Zhang, Hai Li: Fine-grained dynamic voltage scaling on OLED display. ASP-DAC 2012: 807-812 | |
| c48 | Miao Hu, Hai Li, Qing Wu, Garrett S. Rose: Hardware realization of BSB recall function using memristor crossbar arrays. DAC 2012: 498-503 | |
| c47 | Xiuyuan Bi, Chao Zhang, Hai Li, Yiran Chen, Robinson E. Pino: Spintronic memristor based temperature sensor design with CMOS current reference. DATE 2012: 1301-1306 | |
| c46 | Bo Zhao, Jun Yang, Youtao Zhang, Yiran Chen, Hai Li: Architecting a common-source-line array for bipolar non-volatile memory devices. DATE 2012: 1451-1454 | |
| c45 | Yi-Chung Chen, Wenhua Wang, Hai Li, Wei Zhang: Non-volatile 3D stacking RRAM-based FPGA. FPL 2012: 367-372 | |
| c44 | Yi-Chung Chen, Wenhua Wang, Wei Zhang, Hai Li: uBRAM-based run-time reconfigurable FPGA and corresponding reconfiguration methodology. FPT 2012: 80-86 | |
| c43 | Hai Li, Youjian Liu: On Gaussian Multiple Access Channel with Signal Dependent Noise. GLOBECOM 2012: 4326-4331 | |
| c42 | Xiuyuan Bi, Zhenyu Sun, Hai Li, Wenqing Wu: Probabilistic design methodology to improve run-time stability and performance of STT-RAM caches. ICCAD 2012: 88-94 | |
| c41 | Miao Hu, Hai Li, Qing Wu, Garrett S. Rose, Yiran Chen: Memristor crossbar based hardware realization of BSB recall function. IJCNN 2012: 1-7 | |
| c40 | Hui Wang, Hai Li, Robinson E. Pino: Memristor-based synapse design and training scheme for neuromorphic computing architecture. IJCNN 2012: 1-5 | |
| c39 | Hai Li, Zhong Xue, Timothy M. Ellmore, Richard E. Frye, Stephen T. C. Wong: Identification of faulty DTI-based sub-networks in autism using network regularized SVM. ISBI 2012: 550-553 | |
| c38 | Yi-Chung Chen, Hai Li, Wei Zhang: A novel peripheral circuit for RRAM-based LUT. ISCAS 2012: 1811-1814 | |
| c37 | Zhenyu Sun, Hai Li, Wenqing Wu: A dual-mode architecture for fast-switching STT-RAM. ISLPED 2012: 45-50 | |
| c36 | Zhenyu Sun, Xiuyuan Bi, Hai Li: Process variation aware data management for STT-RAM cache design. ISLPED 2012: 179-184 | |
| c35 | Xiuyuan Bi, Hai Li, Jae-Joon Kim: Analysis and Optimization of Thermal Effect on STT-RAM Based 3-D Stacked Cache Design. ISVLSI 2012: 374-379 | |
| c34 | Ali Al-Timemy, Guido Bugmann, Nicholas Outram, Javier Escudero, Hai Li: Finger Movements Classification for the Dexterous Control of Upper Limb Prosthesis Using EMG Signals. TAROS 2012: 434-435 | |
| 2011 | ||
| j13 | Hai Li, Zhong Xue, Kemi Cui, Stephen T. C. Wong: Diffusion tensor-based fast marching for modeling human brain connectivity network. Comp. Med. Imag. and Graph. 35(3): 167-178 (2011) | |
| j12 | Zhong Xue, Dinggang Shen, Hai Li, Stephen T. C. Wong: Tissue probability map constrained 4D clustering algorithm for increased accuracy and robustness in SerialMR brain image segmentation. IJMEI 3(3): 286-298 (2011) | |
| c33 | Miao Hu, Hai Li, Yiran Chen, Xiaobin Wang, Robinson E. Pino: Geometry variations analysis of TiO2 thin-film and spintronic memristors. ASP-DAC 2011: 25-30 | |
| c32 | ||
| c31 | Chun Jason Xue, Youtao Zhang, Yiran Chen, Guangyu Sun, J. Jianhua Yang, Hai Li: Emerging non-volatile memories: opportunities and challenges. CODES+ISSS 2011: 325-334 | |
| c30 | Yi-Chung Chen, Hai Li, Yiran Chen, Robinson E. Pino: 3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers. DATE 2011: 583-586 | |
| c29 | Miao Hu, Hai Li, Robinson E. Pino: Fast statistical model of TiO2 thin-film memristor and design implication. ICCAD 2011: 345-352 | |
| c28 | Yiran Chen, Weng-Fai Wong, Hai Li, Cheng-Kok Koh: Processor caches with multi-level spin-transfer torque ram cells. ISLPED 2011: 73-78 | |
| 2010 | ||
| j11 | Hai Li, Zhong Xue, Lei Guo, Tianming Liu, Jill Hunter, Stephen T. C. Wong: A hybrid approach to automatic clustering of white matter fibers. NeuroImage 49(2): 1249-1258 (2010) | |
| j10 | Zhong Xue, Hai Li, Lei Guo, Stephen T. C. Wong: A local fast marching-based diffusion tensor image registration algorithm by simultaneously considering spatial deformation and tensor orientation. NeuroImage 52(1): 119-130 (2010) | |
| j9 | Hai Li, Guisheng Liao: An Estimation Method for InSAR Interferometric Phase Based on MMSE Criterion. IEEE T. Geoscience and Remote Sensing 48(3-2): 1457-1469 (2010) | |
| j8 | Yiran Chen, Hai Li, Cheng-Kok Koh, Guangyu Sun, Jing Li, Yuan Xie, Kaushik Roy: Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance. IEEE Trans. VLSI Syst. 18(11): 1621-1624 (2010) | |
| j7 | Yiran Chen, Xiaobin Wang, Hai Li, Haiwen Xi, Yuan Yan, Wenzhong Zhu: Design Margin Exploration of Spin-Transfer Torque RAM (STT-RAM) in Scaled Technologies. IEEE Trans. VLSI Syst. 18(12): 1724-1734 (2010) | |
| c27 | Hai Li, Yingguang Li, Wei Wang, Changqing Liu: A cooperative design framework based on multi-agent for aircraft structural parts. CSCWD 2010: 306-311 | |
| c26 | Yiran Chen, Hai Li, Xiaobin Wang, Wenzhong Zhu, Wei Xu, Tong Zhang: A nondestructive self-reference scheme for Spin-Transfer Torque Random Access Memory (STT-RAM). DATE 2010: 148-153 | |
| c25 | ||
| c24 | Guangyu Sun, Yongsoo Joo, Yibo Chen, Dimin Niu, Yuan Xie, Yiran Chen, Hai Li: A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement. HPCA 2010: 1-12 | |
| c23 | Zhenyu Sun, Hai Li, Yiran Chen, Xiaobin Wang: Variation tolerant sensing scheme of Spin-Transfer Torque Memory for yield improvement. ICCAD 2010: 432-437 | |
| c22 | Yiran Chen, Hai Li, Xiaobin Wang, Wenzhong Zhu, Wei Xu, Tong Zhang: Combined magnetic- and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM. ISLPED 2010: 1-6 | |
| c21 | Yiran Chen, Wei Tian, Hai Li, Xiaobin Wang, Wenzhong Zhu: Scalability of PCMO-based resistive switch device in DSM technologies. ISQED 2010: 327-332 | |
| c20 | Hai Li, Zhong Xue, Mario F. Dulay, Amit Verma, Solomon Wong, Christof Karmonik, Robert G. Grossman, Stephen T. C. Wong: Distinguishing Left or Right Temporal Lobe Epilepsy from Controls Using Fractional Anisotropy Asymmetry Analysis. MIAR 2010: 219-227 | |
| 2009 | ||
| j6 | Cheng-Kok Koh, Weng-Fai Wong, Yiran Chen, Hai Li: Tolerating process variations in large, set-associative caches: The buddy cache. TACO 6(2) (2009) | |
| j5 | Yiran Chen, Hai Li, Kaushik Roy, Cheng-Kok Koh: Gated Decap: Gate Leakage Control of On-Chip Decoupling Capacitors in Scaled Technologies. IEEE Trans. VLSI Syst. 17(12): 1749-1752 (2009) | |
| c19 | Hai Li, Yiran Chen: An overview of non-volatile memory technology and the implication for tools and architectures. DATE 2009: 731-736 | |
| c18 | Yingguang Li, Jianbang Jian, Hai Li: An Aircraft Tooling e-Manufacturing Architecture Based on Mobile Agents. DET 2009: 1217-1225 | |
| c17 | Cheng-Kok Koh, Weng-Fai Wong, Yiran Chen, Hai Li: The salvage cache: A fault-tolerant cache architecture for next-generation memory technologies. ICCD 2009: 268-274 | |
| c16 | Hai Li, Zhong Xue, Lei Guo, Stephen T. C. Wong: Simultaneous Consideration of Spatial Deformation and Tensor Orientation in Diffusion Tensor Image Registration Using Local Fast Marching Patterns. IPMI 2009: 63-75 | |
| c15 | Hai Li, Haiwen Xi, Yiran Chen, John Stricklin, Xiaobin Wang, Tong Zhang: Thermal-Assisted Spin Transfer Torque Memory (STT-RAM) Cell Design Exploration. ISVLSI 2009: 217-222 | |
| 2008 | ||
| c14 | Yiran Chen, Xiaobin Wang, Hai Li, Harry Liu, Dimitar V. Dimitrov: Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM). ISQED 2008: 684-690 | |
| 2007 | ||
| c13 | Ian W. Marshall, Mark C. Price, Hai Li, Nathan Boyd, Steve Boult: Multi-sensor Cross Correlation for Alarm Generation in a Deployed Sensor Network. EuroSSC 2007: 286-299 | |
| c12 | Weng-Fai Wong, Cheng-Kok Koh, Yiran Chen, Hai Li: VOSCH: Voltage scaled cache hierarchies. ICCD 2007: 496-503 | |
| c11 | Hai Li, Tianming Liu, Lei Guo, Stephen T. C. Wong: Deformable Registration of Dti and Spgr Images. ISBI 2007: 29-32 | |
| c10 | Yiran Chen, Hai Li, Jing Li, Cheng-Kok Koh: Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI. ISLPED 2007: 195-200 | |
| c9 | Hai Li, Mark C. Price, Jonathan Stott, Ian W. Marshall: The Development of a Wireless Sensor Network Sensing Node Utilising Adaptive Self-diagnostics. IWSOS 2007: 30-43 | |
| 2006 | ||
| j4 | Hai Li, Zhenfang Li, Guisheng Liao, Zheng Bao: An estimation method for InSAR interferometric phase combined with image auto-coregistration. Science in China Series F: Information Sciences 49(3): 386-396 (2006) | |
| j3 | Zhenfang Li, Zheng Bao, Hai Li, Guisheng Liao: Image autocoregistration and InSAR interferogram estimation using joint subspace projection. IEEE T. Geoscience and Remote Sensing 44(2): 288-297 (2006) | |
| c8 | Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh: SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design. ASP-DAC 2006: 158-163 | |
| c7 | Hai Li, Tianming Liu, Geoffrey Young, Lei Guo, Stephen T. C. Wong: Brain tissue segmentation based on DWI/DTI data. ISBI 2006: 57-60 | |
| 2005 | ||
| j2 | Hai Li, Chen-Yong Cher, Kaushik Roy, T. N. Vijaykumar: Combined circuit and architectural level variable supply-voltage scaling for low power. IEEE Trans. VLSI Syst. 13(5): 564-576 (2005) | |
| c6 | Yiran Chen, Hai Li, Kaushik Roy, Cheng-Kok Koh: Cascaded carry-select adder (C2SA): a new structure for low-power CSA design. ISLPED 2005: 115-118 | |
| c5 | Hai Li, Mark Fisher, Moe Razaz: Compile-Time Task Scheduling using a Fuzzy Inference System. Parallel and Distributed Computing and Networks 2005: 546-550 | |
| 2004 | ||
| j1 | Hai Li, Swarup Bhunia, Yiran Chen, Kaushik Roy, T. N. Vijaykumar: DCG: deterministic clock-gating for low-power microprocessor design. IEEE Trans. VLSI Syst. 12(3): 245-254 (2004) | |
| 2003 | ||
| c4 | Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, Kaushik Roy: Deterministic Clock Gating for Microprocessor Power Reduction. HPCA 2003: 113-122 | |
| c3 | Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy: VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power. MICRO 2003: 19-28 | |
| 2002 | ||
| c2 | Swarup Bhunia, Hai Li, Kaushik Roy: A High Performance IDDQ Testable Cache for Scaled CMOS Technologies. Asian Test Symposium 2002: 157- | |
| c1 | Amit Agarwal, Hai Li, Kaushik Roy: DRG-cache: a data retention gated-ground cache for low power. DAC 2002: 473-478 | |
Colors in the list of coauthors
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