| 2013 | ||
|---|---|---|
| j54 | Weijun Xiao, Peng Li, David J. Lilja: Comparing the performance of stochastic simulation on GPUs and OpenMP. IJCSE 8(1): 34-46 (2013) | |
| c103 | Ding Liu, Ruixuan Li, David J. Lilja, Weijun Xiao: A divide-and-conquer approach for solving singular value decomposition on a heterogeneous system. Conf. Computing Frontiers 2013: 36 | |
| 2012 | ||
| c102 | ||
| c101 | Peng Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, David J. Lilja: The synthesis of linear Finite State Machine-based Stochastic Computational Elements. ASP-DAC 2012: 757-762 | |
| c100 | Nohhyun Park, Irfan Ahmad, David J. Lilja: Romano: autonomous storage management using performance prediction in multi-tenant datacenters. SoCC 2012: 21 | |
| c99 | Shruti Patil, Min-Woo Jang, Chia-Ling Chen, Dongjin Lee, Zhijang Ye, Walter E. Partlo, David J. Lilja, Stephen A. Campbell, Tianhong Cui: Weighted area technique for electromechanically enabled logic computation with cantilever-based NEMS switches. DATE 2012: 727-732 | |
| c98 | Weikang Qian, Chen Wang, Peng Li, David J. Lilja, Kia Bazargan, Marc D. Riedel: An efficient implementation of numerical integration using logical computation on stochastic bit streams. ICCAD 2012: 156-162 | |
| c97 | Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, Marc D. Riedel: The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic. ICCAD 2012: 480-487 | |
| c96 | Peng Li, Weikang Qian, David J. Lilja: A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic. ICCD 2012: 303-308 | |
| c95 | Zhe Zhang, Weijun Xiao, Nohhyun Park, David J. Lilja: Memory module-level testing and error behaviors for phase change memory. ICCD 2012: 358-363 | |
| c94 | Weijun Xiao, Xiaoqiang Lei, Ruixuan Li, Nohhyun Park, David J. Lilja: PASS: A Hybrid Storage System for Performance-Synchronization Tradeoffs Using SSDs. ISPA 2012: 403-410 | |
| c93 | Peng Li, Weikang Qian, David J. Lilja, Kia Bazargan, Marc D. Riedel: Case Studies of Logical Computation on Stochastic Bit Streams. PATMOS 2012: 235-244 | |
| c92 | Jiaxi Hu, Zhaosen Wang, Qiyuan Qiu, Weijun Xiao, David J. Lilja: Sparse Fast Fourier Transform on GPUs and Multi-core CPUs. SBAC-PAD 2012: 83-91 | |
| e2 | Pen-Chung Yew, Sangyeun Cho, Luiz DeRose, David J. Lilja (Eds.): International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012. ACM 2012, isbn 978-1-4503-1182-3 | |
| 2011 | ||
| j53 | Joe Myre, Stuart D. C. Walsh, David J. Lilja, Martin O. Saar: Performance analysis of single-phase, multiphase, and multicomponent lattice-Boltzmann fluid flow simulations on GPU clusters. Concurrency and Computation: Practice and Experience 23(4): 332-350 (2011) | |
| j52 | Yocheved Dotan, Nadav Levison, David J. Lilja: Fault tolerance for nanotechnology devices at the bit and module levels with history index of correct computation. IET Computers & Digital Techniques 5(4): 221-230 (2011) | |
| j51 | Weikang Qian, Xin Li, Marc D. Riedel, Kia Bazargan, David J. Lilja: An Architecture for Fault-Tolerant Computation with Stochastic Logic. IEEE Trans. Computers 60(1): 93-105 (2011) | |
| c91 | ||
| c90 | Shruti Patil, David J. Lilja: Performing bitwise logic operations in cache using spintronics-based magnetic tunnel junctions. Conf. Computing Frontiers 2011: 33 | |
| c89 | Shruti R. Patil, David J. Lilja: A programmable and scalable technique to design spintronic logic circuits based on magnetic tunnel junctions. ACM Great Lakes Symposium on VLSI 2011: 7-12 | |
| c88 | ||
| c87 | Biplob K. Debnath, Sudipta Sengupta, Jin Li, David J. Lilja, David Hung-Chang Du: BloomFlash: Bloom Filter on Flash-Based Storage. ICDCS 2011: 635-644 | |
| c86 | Biplob K. Debnath, Krishnan Srinivasan, Weijun Xiao, David J. Lilja, David H. C. Du: Sampling-based garbage collection metadata management scheme for flash-based storage. MSST 2011: 1-6 | |
| e1 | Samuel Kounev, Vittorio Cortellessa, Raffaela Mirandola, David J. Lilja (Eds.): ICPE'11 - Second Joint WOSP/SIPEW International Conference on Performance Engineering, Karlsruhe, Germany, March 14-16, 2011. ACM 2011, isbn 978-1-4503-0519-8 | |
| 2010 | ||
| j50 | Shruti R. Patil, David J. Lilja: Using Resampling Techniques to Compute Confidence Intervals for the Harmonic Mean of Rate-Based Performance Metrics. Computer Architecture Letters 9(1): 1-4 (2010) | |
| j49 | Haowei Bai, David J. Lilja, Mohammed Atiquzzaman: Cross-layer speculative architecture for end systems and gateways in computer networks with lossy links. Wireless Networks 16(6): 1621-1638 (2010) | |
| c85 | Shruti Patil, Andrew Lyle, Jonathan D. Harms, David J. Lilja, Jian-Ping Wang: Spintronic logic gates for spintronic data using magnetic tunnel junctions. ICCD 2010: 125-131 | |
| c84 | Nohhyun Park, David J. Lilja: Characterizing datasets for data deduplication in backup applications. IISWC 2010: 1-10 | |
| c83 | Biplob K. Debnath, Mohamed F. Mokbel, David J. Lilja, David H. C. Du: Deferred updates for flash-based storage. MSST 2010: 1-6 | |
| c82 | Eric Seppanen, Matthew T. O'Keefe, David J. Lilja: High performance solid state storage under Linux. MSST 2010: 1-12 | |
| 2009 | ||
| j48 | Stuart D. C. Walsh, Martin O. Saar, Peter Bailey, David J. Lilja: Accelerating geoscience and engineering system simulations on graphics hardware. Computers & Geosciences 35(12): 2353-2364 (2009) | |
| j47 | Yocheved Dotan, Nadav Levison, Roi Avidan, David J. Lilja: History Index of Correct Computation for Fault-Tolerant Nano-Computing. IEEE Trans. VLSI Syst. 17(7): 943-952 (2009) | |
| c81 | Anand Singh, David J. Lilja: Using a Statistical Approach for Optimal Security Parameter Determination. Security and Management 2009: 515-520 | |
| c80 | Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, David J. Lilja: A reconfigurable stochastic architecture for highly reliable computing. ACM Great Lakes Symposium on VLSI 2009: 315-320 | |
| c79 | Weikang Qian, Marc D. Riedel, Kia Bazargan, David J. Lilja: The synthesis of combinational logic to generate probabilities. ICCAD 2009: 367-374 | |
| c78 | Peter Bailey, Joe Myre, Stuart D. C. Walsh, David J. Lilja, Martin O. Saar: Accelerating Lattice Boltzmann Fluid Flow Simulations Using Graphics Processors. ICPP 2009: 550-557 | |
| c77 | Biplob K. Debnath, Sunil Subramanya, David Hung-Chang Du, David J. Lilja: Large Block CLOCK (LB-CLOCK): A write caching algorithm for solid state disks. MASCOTS 2009: 1-9 | |
| c76 | Anand Singh, David J. Lilja: Improving risk assessment methodology: a statistical design of experiments approach. SIN 2009: 21-29 | |
| 2008 | ||
| j46 | Biplob K. Debnath, Mohamed F. Mokbel, David J. Lilja: Exploiting the Impact of Database System Configuration Parameters: A Design of Experiments Approach. IEEE Data Eng. Bull. 31(1): 3-10 (2008) | |
| j45 | Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja: MMV: A Metamodeling Based Microprocessor Validation Environment. IEEE Trans. VLSI Syst. 16(4): 339-352 (2008) | |
| c75 | Shruti R. Patil, Xiaofeng Yao, Hao Meng, Jian-Ping Wang, David J. Lilja: Design of a spintronic arithmetic and logic unit using magnetic tunnel junctions. Conf. Computing Frontiers 2008: 171-178 | |
| c74 | Renato J. O. Figueiredo, P. Oscar Boykin, José A. B. Fortes, Tao Li, Jie-Kwon Peir, David Wolinsky, Lizy K. John, David R. Kaeli, David J. Lilja, Sally A. McKee, Gokhan Memik, Alain Roy, Gary S. Tyson: Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education. CollaborateCom 2008: 70-84 | |
| c73 | Drew C. Ness, David J. Lilja: Guiding Circuit Level Fault-Tolerance Design with Statistical Methods. DATE 2008: 348-353 | |
| c72 | Drew C. Ness, David J. Lilja: Statistically translating low-level error probabilities to increase the accuracy and efficiency of reliability simulations in hardware description languages. ACM Great Lakes Symposium on VLSI 2008: 297-302 | |
| c71 | Biplob K. Debnath, David J. Lilja, Mohamed F. Mokbel: SARD: A statistical approach for ranking database tuning parameters. ICDE Workshops 2008: 11-18 | |
| c70 | Resit Sendag, Joshua J. Yi, Peng-fei Chuang, David J. Lilja: Low power/area branch prediction using complementary branch predictors. IPDPS 2008: 1-12 | |
| c69 | Vassilios N. Christopoulos, David J. Lilja, Paul R. Schrater, Apostolos P. Georgopoulos: Independent Component Analysis and Evolutionary Algorithms for Building Representative Benchmark Subsets. ISPASS 2008: 169-178 | |
| i1 | Renato J. O. Figueiredo, P. Oscar Boykin, José A. B. Fortes, Tao Li, Jie-Kwon Peir, David Wolinsky, Lizy Kurian John, David R. Kaeli, David J. Lilja, Sally A. McKee, Gokhan Memik, Alain Roy, Gary S. Tyson: Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education. CoRR abs/0807.1765 (2008) | |
| 2007 | ||
| j44 | Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Douglas M. Hawkins, Wei-Chung Hsu, Pen-Chung Yew: CIM: A Reliable Metric for Evaluating Program Phase Classifications. Computer Architecture Letters 6(1): 9-12 (2007) | |
| j43 | Keqiang Wu, David J. Lilja, Haowei Bai: An adaptive dual control framework for QoS design. Cluster Computing 10(2): 217-228 (2007) | |
| j42 | Joshua J. Yi, Resit Sendag, David J. Lilja, Douglas M. Hawkins: Speed versus Accuracy Trade-Offs in Microarchitectural Simulations. IEEE Trans. Computers 56(11): 1549-1563 (2007) | |
| c68 | Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar: Design fault directed test generation for microprocessor validation. DATE 2007: 761-766 | |
| c67 | Christian J. Hescott, Drew C. Ness, David J. Lilja: Scaling Analytical Models for Soft Error Rate Estimation Under a Multiple-Fault Environment. DSD 2007: 641-648 | |
| c66 | Drew C. Ness, Christian J. Hescott, David J. Lilja: Exploring subsets of standard cell libraries to exploit natural fault masking capabilities for reliable logic. ACM Great Lakes Symposium on VLSI 2007: 208-211 | |
| c65 | Christian J. Hescott, Drew C. Ness, David J. Lilja: MEMESTAR: A Simulation Framework for Reliability Evaluation over Multiple Environments. ISQED 2007: 917-922 | |
| c64 | Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja: Model Based Test Generation for Microprocessor Architecture Validation. VLSI Design 2007: 465-472 | |
| 2006 | ||
| j41 | Joshua J. Yi, Lieven Eeckhout, David J. Lilja, Brad Calder, Lizy Kurian John, James E. Smith: The Future of Simulation: A Field of Dreams. IEEE Computer 39(11): 22-29 (2006) | |
| j40 | Haowei Bai, Mohammed Atiquzzaman, David J. Lilja: Layered view of QoS issues in IP-based mobile wireless networks. Int. J. Communication Systems 19(2): 141-161 (2006) | |
| j39 | Donald Johnson, David J. Lilja, John Riedl: Circulating shared-registers for multiprocessor systems. Journal of Systems Architecture 52(3): 152-168 (2006) | |
| j38 | Joshua J. Yi, David J. Lilja: Simulation of Computer Architectures: Simulators, Benchmarks, Methodologies, and Recommendations. IEEE Trans. Computers 55(3): 268-280 (2006) | |
| c63 | Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja: MMV: Metamodeling Based Microprocessor Valiation Environment. HLDVT 2006: 143-148 | |
| c62 | Joshua J. Yi, Hans Vandierendonck, Lieven Eeckhout, David J. Lilja: The exigency of benchmark and compiler drift: designing tomorrow's processors with yesterday's tools. ICS 2006: 75-86 | |
| c61 | Joshua J. Yi, Resit Sendag, Lieven Eeckhout, Ajay Joshi, David J. Lilja, Lizy Kurian John: Evaluating Benchmark Subsetting Approaches. IISWC 2006: 93-104 | |
| c60 | Vidyasagar Nookala, David J. Lilja, Sachin S. Sapatnekar: Temperature-aware floorplanning of microarchitecture blocks with IPC-power dependence modeling and transient analysis. ISLPED 2006: 298-303 | |
| c59 | Ajay Joshi, Joshua J. Yi, Robert H. Bell Jr., Lieven Eeckhout, Lizy Kurian John, David J. Lilja: Evaluating the efficacy of statistical simulation for design space exploration. ISPASS 2006: 70-79 | |
| c58 | Vidyasagar Nookala, Ying Chen, David J. Lilja, Sachin S. Sapatnekar: Comparing simulation techniques for microarchitecture-aware floorplanning. ISPASS 2006: 80-88 | |
| 2005 | ||
| j37 | Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan: A Novel Memory Structure for Embedded Systems: Flexible Sequential and Random Access Memory. J. Comput. Sci. Technol. 20(5): 596-606 (2005) | |
| j36 | Joshua J. Yi, David J. Lilja, Douglas M. Hawkins: Improving Computer Architecture Simulation Methodology by Adding Statistical Rigor. IEEE Trans. Computers 54(11): 1360-1373 (2005) | |
| j35 | Resit Sendag, Ying Chen, David J. Lilja: The Impact of Incorrectly Speculated Memory Operations in a Multithreaded Architecture. IEEE Trans. Parallel Distrib. Syst. 16(3): 271-285 (2005) | |
| c57 | Ying Chen, Dennis Abts, David J. Lilja: Efficiently generating test vectors with state pruning. ASP-DAC 2005: 1196-1199 | |
| c56 | Vidyasagar Nookala, Ying Chen, David J. Lilja, Sachin S. Sapatnekar: Microarchitecture-aware floorplanning using a statistical design of experiments approach. DAC 2005: 579-584 | |
| c55 | Jinpyo Kim, Sreekumar V. Kodakara, Wei-Chung Hsu, David J. Lilja, Pen-Chung Yew: Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations. HiPEAC 2005: 203-217 | |
| c54 | Joshua J. Yi, Sreekumar V. Kodakara, Resit Sendag, David J. Lilja, Douglas M. Hawkins: Characterizing and Comparing Prevailing Simulation Techniques. HPCA 2005: 266-277 | |
| c53 | Keqiang Wu, David J. Lilja, Haowei Bai: The Applicability of Adaptive Control Theory to QoS Design: Limitations and Solutions. IPDPS 2005 | |
| c52 | Kevin KleinOsowski, Thomas Ruwart, David J. Lilja: Communicating Quality of Service Requirements to an Object-Based Storage Device. MSST 2005: 224-231 | |
| 2004 | ||
| j34 | Qing Zhao, David J. Lilja: Static Classification of Value Predictability Using Compiler Hints. IEEE Trans. Computers 53(8): 929-944 (2004) | |
| c51 | Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan: Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory. Asia-Pacific Computer Systems Architecture Conference 2004: 88-101 | |
| c50 | Haowei Bai, Mohammed Atiquzzaman, David J. Lilja: Wireless Sensor Network for Aircraft Health Monitoring. BROADNETS 2004: 748-750 | |
| c49 | Keqiang Wu, Peng-fei Chuang, David J. Lilja: An active data-aware cache consistency protocol for highly-scalable data-shipping DBMS architectures. Conf. Computing Frontiers 2004: 222-234 | |
| c48 | A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rangarajan, Priyadarshini Ranganath, David J. Lilja: The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices. DSN 2004: 167-176 | |
| c47 | Peng-fei Chuang, Resit Sendag, David J. Lilja: Improving Data Cache Performance via Address Correlation: An Upper Bound Study. Euro-Par 2004: 541-550 | |
| c46 | Baris M. Kazar, Shashi Shekhar, David J. Lilja, Ranga Raju Vatsavai, R. Kelley Pace: Comparing Exact and Approximate Spatial Auto-regression Model Solutions for Spatial Data Analysis. GIScience 2004: 140-161 | |
| c45 | Haowei Bai, Mohammed Atiquzzaman, David J. Lilja: Using ECN Marks to Improve TCP Performance over Lossy Links. ICETE (3) 2004: 437-445 | |
| c44 | Keqiang Wu, David J. Lilja: Self-tuning Speculation for Maintaining the Consistency of Client-Cached Data. ICPADS 2004: 91-100 | |
| c43 | A. J. KleinOsowski, David J. Lilja: The NanoBox Project: Exploring Fabrics of Self-Correcting Logic Blocks for High Defect Rate Molecular Device Technologies. ISVLSI 2004: 19-24 | |
| c42 | Ying Chen, Dennis Abts, David J. Lilja: State Pruning for Test Vector Generation for a Multiprocessor Cache Coherence Protocol. IEEE International Workshop on Rapid System Prototyping 2004: 74-77 | |
| 2003 | ||
| j33 | Resit Sendag, Peng-fei Chuang, David J. Lilja: Address Correlation: Exceeding the Limits of Locality. Computer Architecture Letters 2 (2003) | |
| j32 | Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai: Challenges in Computer Architecture Evaluation. IEEE Computer 36(8): 30-36 (2003) | |
| j31 | Jian Huang, David J. Lilja: Balancing Reuse Opportunities and Performance Gains with Subblock Value Reuse. IEEE Trans. Computers 52(8): 1032-1050 (2003) | |
| c41 | Joshua J. Yi, David J. Lilja, Douglas M. Hawkins: A Statistically Rigorous Approach for Improving Simulation Methodology. HPCA 2003: 281-291 | |
| c40 | Keqiang Wu, Resit Sendag, David J. Lilja: Exploring Memory Access Regularity in Pointer-Intensive Application Programs. IDEAL 2003: 472-476 | |
| c39 | Dennis Abts, Steve Scott, David J. Lilja: So Many States, So Little Time: Verifying Memory Coherence in the Cray X1. IPDPS 2003: 11 | |
| c38 | Ying Chen, Resit Sendag, David J. Lilja: Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor. IPDPS 2003: 76 | |
| 2002 | ||
| j30 | A. J. KleinOsowski, David J. Lilja: MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research. Computer Architecture Letters 1 (2002) | |
| j29 | Iffat H. Kazi, David J. Lilja: Dynamically adapting to system load and program behavior in multiprogrammed multiprocessor systems. Concurrency and Computation: Practice and Experience 14(12): 957-985 (2002) | |
| c37 | Resit Sendag, David J. Lilja, Steven R. Kunkel: Exploiting the Prefetching Effect Provided by Executing Mispredicted Load Instructions. Euro-Par 2002: 468-480 | |
| c36 | Joshua J. Yi, Resit Sendag, David J. Lilja: Increasing Instruction-Level Parallelism with Instruction Precomputation (Research Note). Euro-Par 2002: 481-485 | |
| c35 | Joshua J. Yi, David J. Lilja: Improving Processor Performance by Simplifying and Bypassing Trivial Computations. ICCD 2002: 462- | |
| 2001 | ||
| j28 | Kelvin K. Yue, David J. Lilja: Implementing a dynamic processor allocation policy for multiprogrammed parallel applications in the Solaris. Concurrency and Computation: Practice and Experience 13(6): 449-464 (2001) | |
| j27 | Iffat H. Kazi, David J. Lilja: Coarse-Grained Thread Pipelining: A Speculative Parallel Execution Model for Shared-Memory Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 12(9): 952-966 (2001) | |
| c34 | Bob Glamm, David J. Lilja: Automatic Verification of Instruction Set Simulation Using Synchronized State Comparison. Annual Simulation Symposium 2001: 72-77 | |
| c33 | ||
| 2000 | ||
| j26 | Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal: Shared-memory multiprocessing: Current state and future directions. Advances in Computers 53: 1-53 (2000) | |
| j25 | Steven P. Vanderwiel, David J. Lilja: Data prefetch mechanisms. ACM Comput. Surv. 32(2): 174-199 (2000) | |
| j24 | Iffat H. Kazi, Howard H. Chen, Berdenia Stanley, David J. Lilja: Techniques for obtaining high performance in Java programs. ACM Comput. Surv. 32(3): 213-240 (2000) | |
| j23 | Iffat H. Kazi, Davis P. Jose, Badis Ben-Hamida, Christian J. Hescott, Chris Kwok, Joseph A. Konstan, David J. Lilja, Pen-Chung Yew: JaViz: A client/server Java profiling tool. IBM Systems Journal 39(1): 96-117 (2000) | |
| j22 | Jian Huang, David J. Lilja: Extending Value Reuse to Basic Blocks with Compiler Support. IEEE Trans. Computers 49(4): 331-347 (2000) | |
| j21 | Babak Hamidzadeh, Lau Ying Kit, David J. Lilja: Dynamic Task Scheduling Using Online Optimization. IEEE Trans. Parallel Distrib. Syst. 11(11): 1151-1163 (2000) | |
| c32 | Jian Huang, David J. Lilja: Exploring Sub-Block Value Reuse for Superscalar Processors. IEEE PACT 2000: 100-110 | |
| c31 | Iffat H. Kazi, David J. Lilja: A Comprehensive Dynamic Processor Allocation Scheme for Multiprogrammed Multiprocessor Systems. ICPP 2000: 153-162 | |
| c30 | Dennis Abts, Mike Roberts, David J. Lilja: A Balanced Approach to High-Level Verification: Performance Trade-Offs in Verifying Large-Scale Multiprocessors. ICPP 2000: 505- | |
| c29 | Iffat H. Kazi, David J. Lilja: JavaSpMT: A Speculative Thread Pipelining Parallelization Model for Java Programs. IPDPS 2000: 559-564 | |
| 1999 | ||
| j20 | David J. Lilja: Special Issue on Compilation and Architectural Support for Parallel Applications - Guest Editor's Introduction. J. Parallel Distrib. Comput. 58(2): 129-131 (1999) | |
| j19 | Jenn-Yuan Tsai, Jian Huang, Christoffer Amlo, David J. Lilja, Pen-Chung Yew: The Superthreaded Processor Architecture. IEEE Trans. Computers 48(9): 881-902 (1999) | |
| j18 | J. S. Kim, David J. Lilja: Performance-Based Path Determination for Interprocessor Communication in Distributed Computing Systems. IEEE Trans. Parallel Distrib. Syst. 10(3): 316-327 (1999) | |
| c28 | Jian Huang, David J. Lilja: Exploiting Basic Block Value Locality with Block Reuse. HPCA 1999: 106-114 | |
| c27 | Steven P. Vanderwiel, David J. Lilja: A Compiler-Assisted Data Prefetch Controller. ICCD 1999: 372-377 | |
| c26 | JunSeong Kim, David J. Lilja: A Network Status Predictor to Support Dynamic Scheduling in Network-Based Computing Systems. IPPS/SPDP 1999: 372-378 | |
| 1998 | ||
| j17 | Steven P. Vanderwiel, Daphna Nathanson, David J. Lilja: A comparative analysis of parallel programming language complexity and performance. Concurrency - Practice and Experience 10(10): 807-820 (1998) | |
| j16 | Jenn-Yuan Tsai, Zhenzhen Jiang, Zhiyuan Li, David J. Lilja, Xin Wang, Pen-Chung Yew, Bixia Zheng, Stephen J. Schwinn: Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading. J. Inf. Sci. Eng. 14(1): 205-222 (1998) | |
| j15 | Kelvin K. Yue, David J. Lilja: Comparing Processor Allocation Strategies in Multiprogrammed Shared-Memory Multiprocessors. J. Parallel Distrib. Comput. 49(2): 245-258 (1998) | |
| c25 | JunSeong Kim, David J. Lilja: Characterization of Communication Patterns in Message-Passing Parallel Scientific Application Programs. CANPC 1998: 202-216 | |
| c24 | Farnaz Mounes-Toussi, David J. Lilja: The Effect of using State-Based Priority Information in a Shared-Memory Multiprocessor Cache Replacement Policy. ICPP 1998: 217-224 | |
| c23 | Sangyeun Cho, Jenn-Yuan Tsai, Yonghong Song, Bixia Zheng, Stephen J. Schwinn, Xin Wang, Qing Zhao, Zhiyuan Li, David J. Lilja, Pen-Chung Yew: High-Level Information - An Approach for Integrating Front-End and Back-End Compilers. ICPP 1998: 346-355 | |
| c22 | Iffat H. Kazi, David J. Lilja: Coarse-grained Speculative Execution in Shared-memory Multiprocessors. International Conference on Supercomputing 1998: 93-100 | |
| c21 | Kelvin K. Yue, David J. Lilja: Dynamic Processor Allocation with the Solaris Operating System. IPPS/SPDP 1998: 392-397 | |
| c20 | Jian Huang, David J. Lilja: An Efficient Strategy for Developing a Simulator for a Novel Concurrent Multithreaded Processor Architecture. MASCOTS 1998: 185-191 | |
| 1997 | ||
| j14 | Steven P. Vanderwiel, David J. Lilja: When Caches Aren't Enough: Data Prefetching Techniques. IEEE Computer 30(7): 23-30 (1997) | |
| j13 | Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal: Trends in Shared Memory Multiprocessing. IEEE Computer 30(12): 44-50 (1997) | |
| j12 | Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew: Changing Interaction of Compiler and Architecture. IEEE Computer 30(12): 51-58 (1997) | |
| j11 | Donald Johnson, David J. Lilja, John Riedl, James Anderson: Low-Cost, High-Performance Barrier Synchronization on Networks of Workstations. J. Parallel Distrib. Comput. 40(1): 131-137 (1997) | |
| j10 | Kelvin K. Yue, David J. Lilja: An Effective Processor Allocation Strategy for Multiprogrammed Shared-Memory Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 8(12): 1246-1258 (1997) | |
| c19 | JunSeong Kim, David J. Lilja: Exploiting multiple heterogeneous networks to reduce communication costs in parallel programs. Heterogeneous Computing Workshop 1997: 83-95 | |
| c18 | Steven P. Vanderwiel, Daphna Nathanson, David J. Lilja: Complexity and Performance in Parallel Programming Languages. HIPS 1997: 3- | |
| c17 | JunSeong Kim, David J. Lilja: Utilizing Heterogeneous Networks in Distributed Parallel Computing Systems. HPDC 1997: 336- | |
| 1996 | ||
| c16 | Babak Hamidzadeh, David J. Lilja: Dynamic Scheduling Strategies for Shared-memory Multiprocessors. ICDCS 1996: 208-215 | |
| c15 | Kelvin K. Yue, David J. Lilja: Performance Analysis and Prediction of Processor Scheduling Strategies in Multiprogrammed Shared-Memory Multiprocessors. ICPP, Vol. 3 1996: 70-78 | |
| c14 | Kelvin K. Yue, David J. Lilja: Efficient Execution of Parallel Applications in Multiprogrammed Multiprocessor Systems. IPPS 1996: 448-456 | |
| 1995 | ||
| j9 | David J. Lilja: Partitioning tasks between a pair of interconnected heterogeneous processors: A case study. Concurrency - Practice and Experience 7(3): 209-223 (1995) | |
| j8 | Babak Hamidzadeh, Yacine Atif, David J. Lilja: Dynamic scheduling techniques for heterogeneous computing systems. Concurrency - Practice and Experience 7(7): 633-652 (1995) | |
| j7 | Farnaz Mounes-Toussi, David J. Lilja: The Potential of Compile-Time Analysis to Adapt the Cache Coherence Enforcement Strategy to the Data Sharing Characteristics. IEEE Trans. Parallel Distrib. Syst. 6(5): 470-481 (1995) | |
| c13 | Kelvin K. Yue, David J. Lilja: Parameter estimation for a generalized parallel loop scheduling algorithm. HICSS (2) 1995: 187- | |
| c12 | Farnaz Mounes-Toussi, David J. Lilja: Write buffer design for cache-coherent shared-memory multiprocessors. ICCD 1995: 506-511 | |
| c11 | Donald Johnson, David J. Lilja, John Riedl: A Circulating Active Barrier Synchronization Mechanism. ICPP (1) 1995: 202-209 | |
| c10 | Kelvin K. Yue, David J. Lilja: Loop-Level Process Control: An Effective Processor Allocation Policy for Multiprogrammed Shared-Memory Multiprocessors. JSSPP 1995: 182-199 | |
| 1994 | ||
| j6 | ||
| j5 | David J. Lilja: A Multiprocessor Architecture Combining Fine-Grained and Coarse-Grained Parallelism Strategies. Parallel Computing 20(5): 729-751 (1994) | |
| j4 | David J. Lilja: The Impact of Parallel Loop Scheduling Strategies on Prefetching in a Shared Memory Multiprocessor. IEEE Trans. Parallel Distrib. Syst. 5(6): 573-584 (1994) | |
| c9 | David J. Lilja, Jonathan Schmitt: A Data Parallel Implementation of the TRFD Program from the Perfect Benchmarks. EUROSIM 1994: 355-362 | |
| c8 | David J. Lilja, Shanthi Ambalavanan: A Superassociative Tagged Cache Coherence Directory. ICCD 1994: 42-45 | |
| c7 | Babak Hamidzadeh, David J. Lilja: Self-Adjusting Scheduling: An On-Line Optimization Technique for Locality Management and Load Balancing. ICPP 1994: 39-46 | |
| c6 | Donald Johnson, David J. Lilja, John Riedl: A Distributed Hardware Mechanism for Process Synchronization on Shared-Bus Multiprocessors. ICPP 1994: 268-275 | |
| c5 | Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li: An evaluation of a compiler optimization for improving the performance of a coherence directory. International Conference on Supercomputing 1994: 75-84 | |
| c4 | Trung N. Nguyen, Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li: A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement. IFIP PACT 1994: 69-78 | |
| 1993 | ||
| j3 | David J. Lilja: Cache Coherence in Large-Scale Shared-Memory Multiprocessors: Issues and Comparisons. ACM Comput. Surv. 25(3): 303-338 (1993) | |
| j2 | David J. Lilja, Pen-Chung Yew: Improving Memory Utilization in Cache Coherence Directories. IEEE Trans. Parallel Distrib. Syst. 4(10): 1130-1146 (1993) | |
| c3 | Trung N. Nguyen, Zhiyuan Li, David J. Lilja: Efficient Use of Dynamically Tagged Directories Through Compiler Analysis. ICPP 1993: 112-119 | |
| 1991 | ||
| b1 | David J. Lilja: Architectural alternatives for exploiting parallelism. IEEE 1991, isbn 978-0-8186-2642-5, pp. I-X, 1-447 | |
| c2 | David J. Lilja, Pen-Chung Yew: Combining hardware and software cache coherence strategies. ICS 1991: 274-283 | |
| 1990 | ||
| c1 | David J. Lilja, Pen-Chung Yew: Comparing Parallelism Extraction Techniques: Superscalar Processors, Pipelined Processors, and Multiprocessors. ICPP (1) 1990: 563-564 | |
| 1988 | ||
| j1 | David J. Lilja: Reducing the Branch Penalty in Pipelined Processors. IEEE Computer 21(7): 47-55 (1988) | |
Colors in the list of coauthors
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