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 | 2013 | |
|---|---|---|
| j15 |      | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Developing a power-efficient and low-cost 3D NoC using smart GALS-based vertical channels. J. Comput. Syst. Sci. 79(4): 440-456 (2013) |
| j14 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Cluster-based topologies for 3D Networks-on-Chip using advanced inter-layer bus architecture. J. Comput. Syst. Sci. 79(4): 475-491 (2013) |
| c65 | | Sanaz Rahimi Moosavi, Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Enhancing Performance of 3D Interconnection Networks using Efficient Multicast Communication Protocol. PDP 2013: 294-301 |
| c64 | | Masoumeh Ebrahimi, Xin Chang, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg, Hannu Tenhunen: DyXYZ: Fully Adaptive Routing Algorithm for 3D NoCs. PDP 2013: 499-503 |
| 2012 | ||
| j13 | | Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Khalid Latif, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Design and management of high-performance, reliable and thermal-aware 3D networks-on-chip. IET Circuits, Devices & Systems 6(5): 308-321 (2012) |
| j12 | | Tapio Pahikkala, Antti Airola, Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen, Tapio Salakoski: Parallelized Online Regularized Least-Squares for Adaptive Embedded Systems. IJERTCS 3(2): 73-91 (2012) |
| j11 | | Ville Rantala, Pasi Liljeberg, Juha Plosila: Status Data and Communication Aspects in Dynamically Clustered Network-on-Chip Monitoring. J. Electrical and Computer Engineering 2012 (2012) |
| j10 | | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Exploring a Low-Cost and Power-Efficient Hybridization Technique for 3D NoC-Bus Hybrid Architecture Using LastZ-Based Routing Algorithms. J. Low Power Electronics 8(4): 403-414 (2012) |
| j9 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Memory-Efficient On-Chip Network With Adaptive Interfaces. IEEE Trans. on CAD of Integrated Circuits and Systems 31(1): 146-159 (2012) |
| c63 | | Amir-Mohammad Rahmani, Khalid Latif, Kameswar Rao Vaddina, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: ARB-NET: A novel adaptive monitoring platform for stacked mesh 3D NoC architectures. ASP-DAC 2012: 413-418 |
| c62 | | Khalid Latif, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen, Tiberiu Seceleanu: A Cluster-Based Core Protection Technique for Networks-on-Chip. COMPSAC 2012: 360-361 |
| c61 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: CATRA- congestion aware trapezoid-based routing algorithm for on-chip networks. DATE 2012: 320-325 |
| c60 | | Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Power and Thermal Analysis of Stacked Mesh 3D NoC Using AdaptiveXYZ Routing Algorithm. DSD 2012: 208-215 |
| c59 | | Marco Ramírez, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg: NoC-AXI interface for FPGA-based MPSoC platforms. FPL 2012: 479-480 |
| c58 | | Thomas Canhao Xu, Tapio Pahikkala, Antti Airola, Pasi Liljeberg, Juha Plosila, Tapio Salakoski, Hannu Tenhunen: Implementation and Analysis of Block Dense Matrix Decomposition on Network-on-Chips. HPCC-ICESS 2012: 516-523 |
| c57 | | Mohammad Fattah, Marco Ramírez, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila: CoNA: Dynamic application mapping for congestion reduction in many-core systems. ICCD 2012: 364-370 |
| c56 | | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg: Optimized Q-learning model for distributing traffic in on-Chip Networks. NESEA 2012: 1-8 |
| c55 | | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: An Efficient Hybridization Scheme for Stacked Mesh 3D NoC Architecture. PDP 2012: 507-514 |
| c54 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: LEAR - A Low-Weight and Highly Adaptive Routing Method for Distributing Congestions in On-chip Networks. PDP 2012: 520-524 |
| c53 | | Mohammad Fattah, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila: Transport layer aware design of network interface in many-core systems. ReCoSoC 2012: 1-7 |
| c52 | | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg: Adaptive reinforcement learning method for networks-on-chip. ICSAMOS 2012: 236-243 |
| 2011 | ||
| j8 | | Ethiopia Nigussie, Sampo Tuuna, Juha Plosila, Pasi Liljeberg, Jouni Isoaho, Hannu Tenhunen: Boosting performance of self-timed delay-insensitive bit parallel on-chip interconnects. IET Circuits, Devices & Systems 5(6): 505-517 (2011) |
| j7 | | Ville Rantala, Teijo Lehtonen, Pasi Liljeberg, Juha Plosila: Analysis of Monitoring Structures for Network-on-Chip: A Distributed Approach. IJERTCS 2(1): 49-67 (2011) |
| j6 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen: A generic adaptive path-based routing method for MPSoCs. Journal of Systems Architecture - Embedded Systems Design 57(1): 109-120 (2011) |
| j5 | | Thomas Canhao Xu, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen: A study of 3D Network-on-Chip design for data parallel H.264 coding. Microprocessors and Microsystems - Embedded Hardware Design 35(7): 603-612 (2011) |
| c51 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Memory-efficient logic layer communication platform for 3D-stacked memory-on-processor architectures. 3DIC 2011: 1-8 |
| c50 | | Alexander W. Yin, Thomas Canhao Xu, Bo Yang, Pasi Liljeberg, Hannu Tenhunen: Change Function of 2D/3D Network-on-Chip. CIT 2011: 181-188 |
| c49 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Cluster-based topologies for 3D stacked architectures. Conf. Computing Frontiers 2011: 14 |
| c48 | | Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen: Optimal memory controller placement for chip multiprocessor. CODES+ISSS 2011: 217-226 |
| c47 | | Khalid Latif, Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Tiberiu Seceleanu, Pasi Liljeberg, Hannu Tenhunen: Enhancing Performance of NoC-Based Architectures Using Heuristic Virtual-Channel Sharing Approach. COMPSAC 2011: 442-447 |
| c46 | | Rajeev Kumar Kanth, Pasi Liljeberg, Hannu Tenhunen, Qiansu Wan, Yasar Amin, Botao Shao, Qiang Chen, Li-Rong Zheng, Harish Kumar: Evaluating Sustainability, Environmental Assessment and Toxic Emissions during Manufacturing Process of RFID Based Systems. DASC 2011: 1066-1071 |
| c45 | | Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen: Optimal number and placement of Through Silicon Vias in 3D Network-on-Chip. DDECS 2011: 105-110 |
| c44 | | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: LastZ: An Ultra Optimized 3D Networks-on-Chip Architecture. DSD 2011: 173-180 |
| c43 | | Khalid Latif, Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Tiberiu Seceleanu, Pasi Liljeberg, Hannu Tenhunen: Enhancing Performance Sustainability of Fault Tolerant Routing Algorithms in NoC-Based Architectures. DSD 2011: 626-633 |
| c42 | | Kameswar Rao Vaddina, Amir-Mohammad Rahmani, Khalid Latif, Pasi Liljeberg, Juha Plosila: Thermal Analysis of Job Allocation and Scheduling Schemes for 3D Stacked NoC's. DSD 2011: 643-648 |
| c41 | | Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen: Study of Hierarchical N-Body Methods for Network-on-Chip Architectures. Euro-Par Workshops (2) 2011: 365-374 |
| c40 | | Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen: A Minimal Average Accessing Time Scheduler for Multicore Processors. ICA3PP (2) 2011: 287-299 |
| c39 | | Amir-Mohammad Rahmani, Khalid Latif, Kameswar Rao Vaddina, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Power-Efficient Inter-Layer Communication Architectures for 3D NoC. ISVLSI 2011: 355-356 |
| c38 | | Kameswar Rao Vaddina, Amir-Mohammad Rahmani, Khalid Latif, Pasi Liljeberg, Juha Plosila: Thermal Analysis of Advanced 3D Stacked Systems. ISVLSI 2011: 371-372 |
| c37 | | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila: Q-learning based congestion-aware routing algorithm for on-chip network. NESEA 2011: 1-7 |
| c36 | | Amir-Mohammad Rahmani, Pasi Liljeberg, Khalid Latif, Juha Plosila, Kameswar Rao Vaddina, Hannu Tenhunen: Congestion aware, fault tolerant, and thermally efficient inter-layer communication scheme for hybrid NoC-bus 3D architectures. NOCS 2011: 65-72 |
| c35 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Exploring partitioning methods for 3D Networks-on-Chip utilizing adaptive routing model. NOCS 2011: 73-80 |
| c34 | | Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Power and Area Optimization of 3D Networks-on-Chip Using Smart and Efficient Vertical Channels. PATMOS 2011: 278-287 |
| c33 | | Amir-Mohammad Rahmani, Khalid Latif, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: A Stacked Mesh 3D NoC Architecture Enabling Congestion-Aware and Reliable Inter-layer Communication. PDP 2011: 423-430 |
| c32 |  | Ville Rantala, Teijo Lehtonen, Pasi Liljeberg, Juha Plosila: Analysis of Status Data Update in Dynamically Clustered Network-on-chip Monitoring. PECCS 2011: 493-497 |
| c31 | | Tapio Pahikkala, Antti Airola, Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen, Tapio Salakoski: A Parallel Online Regularized Least-squares Machine Learning Algorithm for Future Multi-core Processors. PECCS 2011: 590-599 |
| c30 | | Rajeev Kumar Kanth, Pasi Liljeberg, Hannu Tenhunen, Qiansu Wan, Waqar Ahmad, Li-Rong Zheng, Harish Kumar: Insight into the Requirements of Self-aware, Adaptive and Reliable Embedded Sub-systems of Satellite Spacecraft. PECCS 2011: 603-608 |
| c29 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: High-performance on-chip network platform for memory-on-processor architectures. ReCoSoC 2011: 1-6 |
| c28 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Efficient congestion-aware selection method for on-chip networks. ReCoSoC 2011: 1-4 |
| c27 | | Mohammad Fattah, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila: Exploration of MPSoC monitoring and management systems. ReCoSoC 2011: 1-3 |
| c26 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Agent-based on-chip network using efficient selection method. VLSI-SoC 2011: 284-289 |
| 2010 | ||
| j4 | | Teijo Lehtonen, David Wolpert, Pasi Liljeberg, Juha Plosila, Paul Ampadu: Self-Adaptive System for Addressing Permanent Errors in On-Chip Interconnects. IEEE Trans. VLSI Syst. 18(4): 527-540 (2010) |
| c25 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: CMIT - A novel cluster-based topology for 3D stacked architectures. 3DIC 2010: 1-5 |
| c24 | | Thomas Canhao Xu, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen: Operating System Processor Scheduler Design for Future Chip Multiprocessor. ARCS Workshops 2010: 69-76 |
| c23 | | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Power and performance optimization of voltage/frequency island-based networks-on-chip using reconfigurable synchronous/bi-synchronous FIFOs. Conf. Computing Frontiers 2010: 267-276 |
| c22 | | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Developing reconfigurable FIFOs to optimize power/performance of Voltage/Frequency Island-based networks-on-chip. DDECS 2010: 105-110 |
| c21 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen: Partitioning methods for unicast/multicast traffic in 3D NoC architecture. DDECS 2010: 127-132 |
| c20 | | Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg: A fault-tolerant and congestion-aware routing algorithm for Networks-on-Chip. DDECS 2010: 139-144 |
| c19 | | Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen: A Greedy Heuristic Approximation Scheduling Algorithm for 3D Multicore Processors. Euro-Par Workshops (1) 2010: 281-291 |
| c18 | | Amir-Mohammad Rahmani, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen: Power-aware NoC router using central forecasting-based dynamic virtual channel allocation. ISCAS 2010: 3224-3227 |
| c17 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: Input-Output Selection Based Router for Networks-on-Chip. ISVLSI 2010: 92-97 |
| c16 | | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: BBVC-3D-NoC: An Efficient 3D NoC Architecture Using Bidirectional Bisynchronous Vertical Channels. ISVLSI 2010: 452-453 |
| c15 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: High-Performance TSV Architecture for 3-D ICs. ISVLSI 2010: 467-468 |
| c14 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen: Performance Analysis of 3D NoCs Partitioning Methods. ISVLSI 2010: 479-480 |
| c13 | | Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: A Low-Latency and Memory-Efficient On-chip Network. NOCS 2010: 99-106 |
| c12 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen: HAMUM - A Novel Routing Protocol for Unicast and Multicast Traffic in MPSoCs. PDP 2010: 525-532 |
| c11 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen: A High-Performance Network Interface Architecture for NoCs Using Reorder Buffer Sharing. PDP 2010: 546-550 |
| c10 | | Kameswar Rao Vaddina, Tamoghna Mitra, Pasi Liljeberg, Juha Plosila: Thermal modelling of 3D multicore systems in a flip-chip package. SoCC 2010: 379-383 |
| 2009 | ||
| c9 | | Kameswar Rao Vaddina, Ethiopia Nigussie, Pasi Liljeberg, Juha Plosila: Self-timed thermal sensing and monitoring of multicore systems. DDECS 2009: 246-251 |
| c8 | | Alexander Wei Yin, Liang Guang, Ethiopia Nigussie, Pasi Liljeberg, Jouni Isoaho, Hannu Tenhunen: Architectural Exploration of Per-Core DVFS for Energy-Constrained On-Chip Networks. DSD 2009: 141-146 |
| c7 | | Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen: An Adaptive Unicast/Multicast Routing Algorithm for MPSoCs. DSD 2009: 203-206 |
| c6 | | Alexander Wei Yin, Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen: Explorations of Honeycomb Topologies for Network-on-Chip. NPC 2009: 73-79 |
| 2007 | ||
| j3 | | Teijo Lehtonen, Pasi Liljeberg, Juha Plosila: Online Reconfigurable Self-Timed Links for Fault Tolerant NoC. VLSI Design 2007 (2007) |
| c5 | | Teijo Lehtonen, Pasi Liljeberg, Juha Plosila: Fault Tolerance Analysis of NoC Architectures. ISCAS 2007: 361-364 |
| 2005 | ||
| c4 | | Juha Plosila, Pasi Liljeberg, Jouni Isoaho: Modelling and Refinement of an On-Chip Communication Architecture. ICFEM 2005: 219-234 |
| 2004 | ||
| j2 | | Pasi Liljeberg, Juha Plosila, Jouni Isoaho: Self-timed communication platform for implementing high-performance systems-on-chip. Integration 38(1): 43-67 (2004) |
| 2003 | ||
| j1 | | Juha Plosila, Tiberiu Seceleanu, Pasi Liljeberg: Implementation of a Self-Timed Segmented Bus. IEEE Design & Test of Computers 20(6): 44-50 (2003) |
| c3 | | Johanna Tuominen, Pasi Liljeberg, Jouni Isoaho: Self-Timed Approach for Reducing On-Chip Switching Noise. VLSI-SOC 2003: 19-24 |
| 2002 | ||
| c2 | | Pasi Liljeberg, Imed Ben Dhaou, Juha Plosila, Jouni Isoaho, Hannu Tenhunen: Interconnect peak current reduction for wavelet array processor using self-timed signaling. ISCAS (4) 2002: 485-488 |
| 2001 | ||
| c1 | | Pasi Liljeberg, Juha Plosila, Jouni Isoaho: Asynchronous interface for locally clocked modules in ULSI systems. ISCAS (4) 2001: 170-173 |
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