| 2012 | ||
|---|---|---|
| j4 | Victor Wanderley Costa de Medeiros, Rodrigo Camarotti Ferreira da Rocha, Antonyus Pyetro do Amaral Ferreira, João Paulo Fernandes Barbosa, Abel Guilhermino Silva-Filho, Manoel Eusebio de Lima, Thomas Grosser, Wolfgang Rosenstiel: FPGA-based architecture to speed-up scientific computation in seismic applications. IJHPSA 4(2): 65-77 (2012) | |
| j3 | Rodolfo P. dos Santos, Gabriela S. Clemente, Abel Guilhermino Silva-Filho, Cristiano C. de Araujo, Sarmento Adriano, Manoel Eusebio de Lima, Edna Barros: An Optimization Mechanism Intended for Static Power Reduction Using Dual-VthTechnique. J. Electrical and Computer Engineering 2012 (2012) | |
| c19 | Gilliano Ginno Silva de Menezes, Abel G. Silva-Filho, Viviane Lucy Santos de Souza, Victor Wanderley Costa de Medeiros, Manoel Eusebio de Lima, Rodrigo Gandra, Ricardo Bragança: Energy Estimation Tool FPGA-based Approach for Petroleum Industry. ICPP Workshops 2012: 600-601 | |
| 2011 | ||
| j2 | Abel Guilhermino Silva-Filho, Filipe R. Cordeiro, Cristiano C. de Araujo, Sarmento Adriano, Millena Gomes, Edna Barros, Manoel Eusebio de Lima: An ESL Approach for Energy Consumption Analysis of Cache Memories in SoC Platforms. Int. J. Reconfig. Comp. 2011 (2011) | |
| c18 | Victor Wanderley Costa de Medeiros, Rodrigo Camarotti Ferreira da Rocha, Antonyus Pyetro do Amaral Ferreira, Bruno Holanda Tavares Charamba Dutra, Abner Correa Barros, João Cleber Bezerra Liborio Correia, João Paulo Fernandes Barbosa, Severino José de Barros-Junior, Gilliano Ginno Silva de Menezes, Abel Guilhermino Silva-Filho, Manoel Eusebio de Lima: Poster: high performance FPGA-based implementation of the seismic modeling of the RTM algorithm. SC Companion 2011: 41-42 | |
| 2009 | ||
| c17 | Viviane Lucy Santos de Souza, Victor Wanderley Costa de Medeiros, Manoel Eusebio de Lima: Architecture for dense matrix multiplication on a high-performance reconfigurable system. SBCCI 2009 | |
| 2008 | ||
| c16 | Paulo Sérgio Brandão do Nascimento, Victor Wanderley Costa de Medeiros, Viviane Lucy Santos de Souza, Abner Correa Barros, Manoel Eusebio de Lima: A Temporal Partitioning Methodology for Reconfigurable High Performance Computers. ReConFig 2008: 307-312 | |
| c15 | Abner Correa Barros, Victor Wanderley Costa de Medeiros, Viviane Lucy Santos de Souza, Paulo Sérgio Brandão do Nascimento, Ângelo Mazer, João Paulo Fernandes Barbosa, Bruno P. Neves, Ismael Santos, Manoel Eusebio de Lima: Implementation of a double-precision multiplier accumulator with exception treatment to a dense matrix multiplier module in FPGA. SBCCI 2008: 40-45 | |
| 2007 | ||
| c14 | Jordana L. Seixas, Edson Barbosa, Stelita M. da Silva, Paulo Sérgio B. do Nascimento, Vinícius Kursancew, Remy Eskinazi Sant'Anna, Edna Barros, Manoel Eusebio de Lima: Aquarius: a dynamically reconfigurable computing platform. SBCCI 2007: 171-176 | |
| 2006 | ||
| c13 | Paulo Sérgio B. do Nascimento, Manoel Eusebio de Lima: Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures. DATE 2006: 375-380 | |
| c12 | Abel G. Silva-Filho, Filipe R. Cordeiro, Remy Eskinazi Sant'Anna, Manoel Eusebio de Lima: Heuristic for Two-Level Cache Hierarchy Exploration Considering Energy Consumption and Performance. PATMOS 2006: 75-83 | |
| c11 | Abel Guilhermino Silva-Filho, Pablo Viana, Edna Barros, Manoel Eusebio de Lima: Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption. SBAC-PAD 2006: 125-132 | |
| c10 | Paulo Sérgio B. do Nascimento, Manoel Eusebio de Lima, Stelita M. da Silva, Jordana L. Seixas: Mapping of image processing systems to FPGA computer based on temporal partitioning and design space exploration. SBCCI 2006: 50-55 | |
| 2005 | ||
| j1 | Guido Araujo, Edna Barros, Elmar U. K. Melcher, Rodolfo Azevedo, Karina R. G. da Silva, Bruno Prado, Manoel Eusebio de Lima: A SystemC-only design methodology and the CINE-IP multimedia platform. Design Autom. for Emb. Sys. 10(2-3): 181-202 (2005) | |
| c9 | Remy Eskinazi Sant'Anna, Manoel Eusebio de Lima, Paulo Romero Martins Maciel, Carlos A. Valderrama, Abel Guilhermino Silva-Filho, Paulo Sérgio B. do Nascimento: A petri-net based Pre-runtime scheduler for dynamically self-reconfiguration of FPGAs (abstract only). FPGA 2005: 262 | |
| c8 | Paulo Sérgio B. do Nascimento, Paulo Romero Martins Maciel, Manoel Eusebio de Lima, Remy Eskinazi Sant'Anna, Abel Guilhermino Silva-Filho: A partial reconfigurable FPGA implementation for industrial controllers using SFC-petri net description (abstract only). FPGA 2005: 275 | |
| c7 | Remy Eskinazi Sant'Anna, Manoel Eusebio de Lima, Paulo Romero Martins Maciel, Carlos A. Valderrama, Abel Guilhermino Silva-Filho, Paulo Sérgio B. do Nascimento: A Timed Petri Net Approach for Pre-Runtime Scheduling in Partial and Dynamic Reconfigurable Systems. IPDPS 2005 | |
| c6 | Abner Correa Barros, Pericles Lima, Juliana Xavier, Manoel Eusebio de Lima: Teaching SoC Design in a Project-Oriented Course Based on Robotics. MSE 2005: 25-26 | |
| 2004 | ||
| c5 | Remy Eskinazi Sant'Anna, Manoel Eusebio de Lima, Paulo Romero Martins Maciel: A left-edge algorithm approach for scheduling and allocation of hardware contexts in dynamically reconfigurable architectures. FPGA 2004: 259 | |
| c4 | Paulo Sérgio B. do Nascimento, Paulo Romero Martins Maciel, Manoel Eusebio de Lima, Remy Eskinazi Sant'Anna, Abel Guilhermino Silva-Filho: A partial reconfigurable architecture for controllers based on Petri nets. SBCCI 2004: 16-21 | |
| 2003 | ||
| c3 | Julio A. de Oliveira Filho, Manoel Eusebio de Lima, Paulo Romero Martins Maciel: Petri Net Based Interface Analysis for Fast IP-Core Integration. MEMOCODE 2003: 34- | |
| c2 | Abel Guilhermino Silva-Filho, Alejandro César Frery, Cristiano C. de Araujo, Haglay Alice, Jorge Cerqueira, Juliana A. Loureiro, Manoel Eusebio de Lima, Maria das Gracas S. Oliveira, Michelle Matos Horta: Hyperspectral Images Clustering on Reconfigurable Hardware Using the K-Means Algorithm. SBCCI 2003: 99-104 | |
| c1 | Julio A. de Oliveira Filho, Manoel Eusebio de Lima, Paulo Romero Martins Maciel, Juliana Moura, Bruno Celso: A Fast IP-Core Integration Methodology for SoC Design. SBCCI 2003: 131-136 | |
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