Wun-Ji Lin

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	2008
j1		Chua-Chin Wang, Gang-Neng Sung, Chi-Chun Huang, Ching-Li Lee, Tian-Hau Chen, Wun-Ji Lin, Ron Hu: A 1.7-ns Access Time SRAM Using Variable Bulk Bias wordline-Controlled transistors. Journal of Circuits, Systems, and Computers 17(5): 943-956 (2008)
	2006
c1		Chua-Chin Wang, Ching-Li Lee, Wun-Ji Lin: A 4-Kb low power 4-T SRAM design with negative word-line gate drive. ISCAS 2006

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