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Xun Liu
2010 – today
- 2012
[j21]Xun Liu, Lixin Tian, Yuhai Wu: Exact solutions of four generalized Benjamin-Bona-Mahony equations with any order. Applied Mathematics and Computation 218(17): 8602-8613 (2012)- [j20]W. X. Zhong, S. Y. Hui, W. C. Ho, Xun Liu: Using Self-Driven AC-DC Synchronous Rectifier as a Direct Replacement for Traditional Power Diode Rectifier. IEEE Transactions on Industrial Electronics 59(1): 392-401 (2012)
- 2011
- [j19]Xun Liu, Changyu Huang, Wei-Liang Qian, Yong-Chang Huang: Studies on Utilizing the Three Famous International Index Systems to Evaluate Scientific Research Level of Higher Learning Institutions. IJSITA 2(2): 67-77 (2011)
- [j18]Jin Fan, Xiaosi Gu, Xun Liu, Kevin G. Guise, Yunsoo Park, Laura Martin, Ashley de Marchena, Cheuk Y. Tang, Michael J. Minzenberg, Patrick R. Hof: Involvement of the anterior cingulate and frontoinsular cortices in rapid processing of salient facial emotional information. NeuroImage 54(3): 2539-2546 (2011)
- [j17]W. X. Zhong, Xun Liu, Ron Shu-Yuen Hui: A Novel Single-Layer Winding Array and Receiver Coil Structure for Contactless Battery Charging Systems With Free-Positioning and Localized Charging Features. IEEE Transactions on Industrial Electronics 58(9): 4136-4144 (2011)
- 2010
- [j16]Xun Liu, Lixin Tian, Yuhai Wu: Application of (G'/G)-expansion method to two nonlinear evolution equations. Applied Mathematics and Computation 217(4): 1376-1384 (2010)
- [j15]Liang Wang, Xun Liu, Kevin G. Guise, Robert T. Knight, Jamshid Ghajar, Jin Fan: Effective Connectivity of the Fronto-parietal Network during Attentional Control. J. Cognitive Neuroscience 22(3): 543-553 (2010)
- [j14]Taemin Kim, Xun Liu: A Functional Unit and Register Binding Algorithm for Interconnect Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 29(4): 641-646 (2010)
- [c29]Taemin Kim, Xun Liu: A global interconnect reduction technique during high level synthesis. ASP-DAC 2010: 695-700
- [c28]Won Ha Choi, Xun Liu: Case Study: GPU-based implementation of sequence pair based floorplanning using CUDA. ISCAS 2010: 917-920
- [c27]Won Ha Choi, Xun Liu: Case study: Runtime reduction of a buffer insertion algorithm using GPU parallel programming. SoCC 2010: 121-126
2000 – 2009
- 2009
- [j13]Xun Liu: Book Review: Thomas Erickson and David W. McDonald (eds), HCI Remixed: Reflections on Works that Have Influenced the HCI Community. Cambridge, MA: MIT Press, 2008. vi + 337 pp. ISBN 9780262050883, $40 (hbk). New Media & Society 11(4): 650-654 (2009)
- [j12]Zhengtao Yu, Xun Liu: Implementing Multiphase Resonant Clocking on a Finite-Impulse Response Filter. IEEE Trans. VLSI Syst. 17(11): 1593-1601 (2009)
- [c26]Taemin Kim, Xun Liu: Better than optimum?: register reduction using idle pipelined functional units. ACM Great Lakes Symposium on VLSI 2009: 327-332
- [c25]Tongtong Chen, Xun Liu: A Case Study of Design Optimization through Variable Width Selection. ISCAS 2009: 1361-1364
- 2008
- [j11]Xun Liu, Robert LaRose: Does Using the Internet Make People More Satisfied with Their Lives? The Effects of the Internet on College Students' School Life Satisfaction. Cyberpsy., Behavior, and Soc. Networking 11(3): 310-320 (2008)
- [j10]Xun Liu, Nicholas A. Steinmetz, Alison B. Farley, Charles D. Smith, Jane E. Joseph: Mid-fusiform Activation during Object Discrimination Reflects the Process of Differentiating Structural Descriptions. J. Cognitive Neuroscience 20(9): 1711-1726 (2008)
- [c24]Lixia Yang, Xun Liu, Changyong Xu: Hindrances to the Development of Tourism E-Commerce in China. ISECS 2008: 588-591
- 2007
- [j9]Zhengtao Yu, Xun Liu: Low-Power Rotary Clock Array Design. IEEE Trans. VLSI Syst. 15(1): 5-12 (2007)
- [c23]
- [c22]Zhengtao Yu, Marios C. Papaefthymiou, Xun Liu: Skew spreading for peak current reduction. ACM Great Lakes Symposium on VLSI 2007: 461-464
- [c21]Taemin Kim, Xun Liu: Compatibility path based binding algorithm for interconnect reduction in high level synthesis. ICCAD 2007: 435-441
- [i1]Xun Liu, Yuantao Peng, Marios C. Papaefthymiou: RIP: An Efficient Hybrid Repeater Insertion Scheme for Low Power. CoRR abs/0710.4690 (2007)
- 2006
- [j8]Xun Liu, Hongbin Wang, Christine R. Corbly, Jiajie Zhang, Jane E. Joseph: The Involvement of the Inferior Parietal Cortex in the Numerical Stroop Effect and the Distance Effect in a Two-digit Number Comparison Task. J. Cognitive Neuroscience 18(9): 1518-1530 (2006)
- [j7]Xun Liu, Yuantao Peng, Marios C. Papaefthymiou: Practical repeater insertion for low power: what repeater library do we need? IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 917-924 (2006)
- [j6]Yuantao Peng, Xun Liu: An Efficient Low-Power Repeater-Insertion Scheme. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2726-2736 (2006)
- [c20]Yuantao Peng, Xun Liu: Low-power repeater insertion with both delay and slew rate constraints. DAC 2006: 302-307
- [c19]Lifang Wu, Xianglong Meng, Xun Liu, Shiju Chen: A New Method of Object Segmentation in the Basketball Videos. ICPR (1) 2006: 319-322
- [c18]Tongtong Chen, Zhengtao Yu, Yuantao Peng, Yanbing Zhang, Huaiyu Dai, Xun Liu: A Mimo Receiver SOC for CDMA Applications. SoCC 2006: 275-278
- 2005
- [j5]Lixin Tian, Jiangbo Zhou, Xun Liu, Guangsheng Zhong: Nonwandering operators in Banach space. Int. J. Math. Mathematical Sciences 2005(24): 3895-3908 (2005)
- [j4]Xun Liu, Marios C. Papaefthymiou: HyPE: hybrid power estimation for IP-based systems-on-chip. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1089-1103 (2005)
- [c17]Yuantao Peng, Xun Liu: Freeze: engineering a fast repeater insertion solver for power minimization using the ellipsoid method. DAC 2005: 813-818
- [c16]Xun Liu, Yuantao Peng, Marios C. Papaefthymiou: RIP: An Efficient Hybrid Repeater Insertion Scheme for Low Power. DATE 2005: 1330-1335
- [c15]Yuantao Peng, Xun Liu: A sensitivity analysis of low-power repeater insertion. ACM Great Lakes Symposium on VLSI 2005: 244-247
- [c14]
- [c13]Yuantao Peng, Xun Liu: RITC: Repeater Insertion with Timing Target Compensation. ISVLSI 2005: 299-300
- [c12]Xun Liu, Yang Gao, Dong Shao, Ruili Wang: Feedback based Dynamic Autonomous Web Service Composition. SKG 2005: 19
- [c11]
- 2004
- [j3]Xun Liu, Marios C. Papaefthymiou: A Markov chain sequence generator for power macromodeling. IEEE Trans. on CAD of Integrated Circuits and Systems 23(7): 1048-1062 (2004)
- [c10]Xun Liu, Yuantao Peng, Marios C. Papaefthymiou: Practical repeater insertion for low power: what repeater library do we need? DAC 2004: 30-35
- [c9]Yuantao Peng, Xun Liu: Power macromodeling of global interconnects considering practical repeater insertion. ACM Great Lakes Symposium on VLSI 2004: 244-247
- [c8]Yuantao Peng, Xun Liu: Global interconnect optimization with simultaneous macrocell placement and repeater insertion. SoCC 2004: 340-343
- 2003
- [j2]Xun Liu, Marios C. Papaefthymiou: Design of a 20-mb/s 256-state Viterbi decoder. IEEE Trans. VLSI Syst. 11(6): 965-975 (2003)
- [c7]Xun Liu, Marios C. Papaefthymiou: HyPE: hybrid power estimation for IP-based programmable systems. ASP-DAC 2003: 606-609
- 2002
- [j1]Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman: Retiming and clock scheduling for digital circuit optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 21(2): 184-203 (2002)
- [c6]Xun Liu, Marios C. Papaefthymiou: Design of a high-throughput low-power IS95 Viterbi decoder. DAC 2002: 263-268
- [c5]Xun Liu, Marios C. Papaefthymiou: A Markov chain sequence generator for power macromodeling. ICCAD 2002: 404-411
- [c4]Xun Liu, Marios C. Papaefthymiou: Incorporation of input glitches into power macromodeling. ISCAS (4) 2002: 846-849
- 2001
- [c3]Xun Liu, Marios C. Papaefthymiou: A static power estimation methodolodgy for IP-based design. DATE 2001: 280-289
1990 – 1999
- 1999
- [c2]Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman: Maximizing Performance by Retiming and Clock Skew Scheduling. DAC 1999: 231-236
- [c1]Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman: Minimizing Sensitivity to Delay Variations in High-Performance Synchronous Circuits. DATE 1999: 643-649
Coauthor Index
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last updated on 2013-03-04 22:38 CET by the dblp team