UCLA
List of publications from the DBLP Bibliography Server - FAQother persons with the same name:
| 2012 | ||
|---|---|---|
| c11 | Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Hui Huang, Bin Liu, Raghu Prabhakar, Glenn Reinman, Marco Vitanza: Compilation and architecture support for customized vector instruction extension. ASP-DAC 2012: 652-657 | |
| c10 | Yu-Ting Chen, Jason Cong, Hui Huang, Bin Liu, Chunyue Liu, Miodrag Potkonjak, Glenn Reinman: Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design. DATE 2012: 45-50 | |
| c9 | Jason Cong, Bin Liu, Guojie Luo, Raghu Prabhakar: Towards layout-friendly high-level synthesis. ISPD 2012: 165-172 | |
| 2011 | ||
| j3 | Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo Noguera, Kees A. Vissers, Zhiru Zhang: High-Level Synthesis for FPGAs: From Prototyping to Deployment. IEEE Trans. on CAD of Integrated Circuits and Systems 30(4): 473-491 (2011) | |
| j2 | Jason Cong, Wei Jiang, Bin Liu, Yi Zou: Automatic memory partitioning and scheduling for throughput and power optimization. ACM Trans. Design Autom. Electr. Syst. 16(2): 15 (2011) | |
| 2010 | ||
| j1 | Jason Cong, Bin Liu, Rupak Majumdar, Zhiru Zhang: Behavior-Level Observability Analysis for Operation Gating in Low-Power Behavioral Synthesis. ACM Trans. Design Autom. Electr. Syst. 16(1): 4 (2010) | |
| c8 | Jason Cong, Bin Liu, Junjuan Xu: Coordinated resource optimization in behavioral synthesis. DATE 2010: 1267-1272 | |
| c7 | Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan, Yi Zou: Accelerating Monte Carlo based SSTA using FPGA. FPGA 2010: 111-114 | |
| 2009 | ||
| c6 | Jason Cong, Albert Liu, Bin Liu: A variation-tolerant scheduler for better than worst-case behavioral synthesis. CODES+ISSS 2009: 221-228 | |
| c5 | Jason Cong, Karthik Gururaj, Bin Liu, Chunyue Liu, Zhiru Zhang, Sheng Zhou, Yi Zou: Evaluation of Static Analysis Techniques for Fixed-Point Precision Optimization. FCCM 2009: 231-234 | |
| c4 | Jason Cong, Karthik Gururaj, Bin Liu, Chunyue Liu, Yi Zou, Zhiru Zhang, Sheng Zhou: Revisiting bitwidth optimizations. FPGA 2009: 278 | |
| c3 | ||
| c2 | Jason Cong, Wei Jiang, Bin Liu, Yi Zou: Automatic memory partitioning and scheduling for throughput and power optimization. ICCAD 2009: 697-704 | |
| c1 | Jason Cong, Bin Liu, Zhiru Zhang: Behavior-level observability don't-cares and application to low-power behavioral synthesis. ISLPED 2009: 139-144 | |
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