Antonio Lloris-Ruíz

Encarnación Castillo, Uwe Meyer-Bäse, Antonio García, Luis Parrilla, Antonio Lloris-Ruíz: IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores. IEEE Trans. VLSI Syst. 15(5): 578-591 (2007)

Encarnación Castillo, Luis Parrilla, Antonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz: Intellectual Property Protection of HDL IP Cores Through Automated Sognature Hosting. FPL 2007: 183-188

Encarnación Castillo, Luis Parrilla, Antonio García, Antonio Lloris-Ruíz, Uwe Meyer-Bäse: IPP Watermarking Technique for IP Core Protection on FPL Devices. FPL 2006: 1-6

Antonio García, Javier Ramírez, Uwe Meyer-Bäse, Encarnación Castillo, Antonio Lloris-Ruíz: Efficient Embedded FPL Resource Usage for RNS-based Polyphase DWT Filter Banks. FPL 2005: 531-534

Daniel González, Luis Parrilla, Antonio García, Encarnación Castillo, Antonio Lloris-Ruíz: Efficient Clock Distribution Scheme for VLSI RNS-Enabled Controllers. PATMOS 2005: 657-665

Luis Parrilla, Encarnación Castillo, Antonio García, Antonio Lloris-Ruíz: Intellectual Property Protection for RNS Circuits on FPGAs. FPL 2004: 1139-1141

Javier Ramírez, Antonio García, Uwe Meyer-Bäse, Fred J. Taylor, Antonio Lloris-Ruíz: Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic. VLSI Signal Processing 33(1-2): 171-190 (2003)

Javier Ramírez, Uwe Meyer-Bäse, Fred J. Taylor, Antonio García, Antonio Lloris-Ruíz: Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies. VLSI Signal Processing 34(3): 227-237 (2003)

Javier Ramírez, Uwe Meyer-Bäse, Antonio García, Antonio Lloris-Ruíz: Design and Implementation of RNS-Based Adaptive Filters. FPL 2003: 1135-1138

Daniel González, Antonio García, Graham A. Jullien, Javier Ramírez, Luis Parrilla, Antonio Lloris-Ruíz: A New Methodology for Efficient Synchronization of RNS-Based VLSI Systems. PATMOS 2002: 188-197

Javier Ramírez, Antonio García, Pedro G. Fernández, Luis Parrilla, Antonio Lloris-Ruíz: Analysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform. FPL 2000: 342-351

Antonio García, Antonio Lloris-Ruíz: A Look-Up Scheme for Scaling in the RNS. IEEE Trans. Computers 48(7): 748-751 (1999)

Antonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz, Fred J. Taylor: RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic. ISCAS (1) 1999: 486-489

Luis Parrilla, Julio Ortega, Antonio Lloris-Ruíz: Using PVM for Distributed Logic Minimization in a Network of Computers. PVM/MPI 1999: 541-548

Julio Ortega, Luis Parrilla, Alberto Prieto, Antonio Lloris-Ruíz, Carlos García Puntonet: Modified Boltzmann Machine for an Efficient Distributed Implementation. IWANN 1997: 1221-1232

Pablo P. Trabado, Antonio Lloris-Ruíz, Julio Ortega: Solution of Switching Equations Based on a Tabular Algebra. IEEE Trans. Computers 42(5): 591-596 (1993)

Julio Ortega, Alberto Prieto, Antonio Lloris-Ruíz, Francisco J. Pelayo: Generalized Hopfield Neural Network for Concurrent Testing. IEEE Trans. Computers 42(8): 898-912 (1993)

Julio Ortega, Antonio Lloris-Ruíz, Alberto Prieto, Francisco J. Pelayo: Test-Pattern Generation Based on Reed-Muller Coefficients. IEEE Trans. Computers 42(8): 968-980 (1993)

Antonio Lloris-Ruíz, Juan Francisco Gómez-Lopera, Ramón Román-Roldán: Entropic Minimization of Multiple-Valued Functions. ISMVL 1993: 24-28

Julio Ortega, Alberto Prieto, Francisco J. Pelayo, Antonio Lloris-Ruíz, P. Martin-Smith: Optimization Problems on Concurrent Testing Solved by Neural Networks. IWANN 1991: 385-400