P. Geoffrey Lowney

Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood: Pin: building customized program analysis tools with dynamic instrumentation. PLDI 2005: 190-200

Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney: Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture. CGO 2004: 15-26

Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn: Profile-guided post-link stride prefetching. ICS 2002: 167-178

Roger Espasa, Federico Ardanaz, Julio Gago, Roger Gramunt, Isaac Hernandez, Toni Juan, Joel S. Emer, Stephen Felix, P. Geoffrey Lowney, Matthew Mattina, André Seznec: Tarantula: A Vector Extension to the Alpha Architecture. ISCA 2002: 281-

Alex Ramírez, Luiz André Barroso, Kourosh Gharachorloo, Robert S. Cohn, Josep-Lluis Larriba-Pey, P. Geoffrey Lowney, Mateo Valero: Code layout optimizations for transaction processing workloads. ISCA 2001: 155-164

Robert S. Cohn, P. Geoffrey Lowney: Design and Analysis of Profile-Based Optimization in Compaq's Compilation Tools for Alpha. J. Instruction-Level Parallelism 2 (2000)

Robert S. Cohn, David W. Goodwin, P. Geoffrey Lowney: Optimizing Alpha Executables on Windows NT with Spike. Digital Technical Journal 9(4) (1998)

Robert S. Cohn, P. Geoffrey Lowney: Hot Cold Optimization of Large Windows/NT Applications. MICRO 1996: 80-89

Stefan M. Freudenberger, Thomas R. Gross, P. Geoffrey Lowney: Avoidance and Supression of Compensation Code in a Trace Scheduling Compiler. ACM Trans. Program. Lang. Syst. 16(4): 1156-1214 (1994)

P. Geoffrey Lowney, Stefan M. Freudenberger, Thomas J. Karzes, Woody Lichtenstein, Robert P. Nix, John S. O'Donnell, John C. Ruttenberg: The multiflow trace scheduling compiler. The Journal of Supercomputing 7(1-2): 51-142 (1993)

P. Geoffrey Lowney: Carrier Arrays: An Idiom-Preserving Extension to APL. POPL 1981: 1-13