Marcelo Lubaszewski

Marcelo de Souza Moraes, Marcos Barcellos Hervé, Marcelo Lubaszewski: Low pin count DfT technique for RFID ICs. DFT 2012: 31-36

Luiz Fernando Gonçalves, Jefferson Luiz Bosa, Tiago Roberto Balen, Marcelo Lubaszewski, Eduardo Luis Schneider, Renato V. B. Henriques: Fault Detection, Diagnosis and Prediction in Electrical Valves Using Self-Organizing Maps. J. Electronic Testing 27(4): 551-564 (2011)

Marcos Barcellos Hervé, Marcelo de Souza Moraes, Pedro Almeida, Marcelo Lubaszewski, Fernanda Lima Kastensmidt, Érika F. Cota: Functional Test of Mesh-Based NoCs with Deterministic Routing: Integrating the Test of Interconnects and Routers. J. Electronic Testing 27(5): 635-646 (2011)

Caroline Concatto, João Almeida, Guilherme Fachini, Marcos Herve, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski: Improving the yield of NoC-based systems through fault diagnosis and adaptive routing. J. Parallel Distrib. Comput. 71(5): 664-674 (2011)

Alexandre M. Amory, Cristiano Lazzari, Marcelo Lubaszewski, Fernando Gehm Moraes: A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms. J. Parallel Distrib. Comput. 71(5): 675-686 (2011)

Renato P. Ribas, S. Bavaresco, N. Schuch, Vinicius Callegaro, Marcelo Lubaszewski, André Inácio Reis: Contributions to the evaluation of ensembles of combinational logic gates. Microelectronics Journal 42(2): 371-381 (2011)

Alexandre M. Amory, Luciano Ost, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski: Evaluating energy consumption of homogeneous MPSoCs using spare tiles. DATE 2011: 1164-1167

Alexandre M. Amory, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski: Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time. International Symposium on Rapid System Prototyping 2011: 164-170

Alexandre M. Amory, Cristiano Lazzari, Marcelo Lubaszewski, Fernando Gehm Moraes: Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs. SBCCI 2011: 73-78

Gabriel de M. Borges, Luiz Fernando Gonçalves, Tiago R. Balen, Marcelo Lubaszewski: Increasing reliability of programmable mixed-signal systems by applying design diversity redundancy. European Test Symposium 2010: 261

Tiago R. Balen, Marcelo Lubaszewski: Radiation effects on programmable analog devices and mitigation techniques. IOLTS 2010: 136

Matheus Braga, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski: Efficiently using data splitting and retransmission to tolerate faults in networks-on-chip interconnects. ISCAS 2010: 4101-4104

Gabriel de M. Borges, Luiz Fernando Gonçalves, Tiago R. Balen, Marcelo Lubaszewski: Evaluating the effectiveness of a mixed-signal TMR scheme based on design diversity. SBCCI 2010: 134-139

Mariza Botelho, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Érika F. Cota, Luigi Carro: A broad strategy to detect crosstalk faults in network-on-chip interconnects. VLSI-SoC 2010: 298-303

Marcelo Lubaszewski, Érika F. Cota: Special session 12B: Embedded tutorial test and fault tolerance of networks-on-chip. VTS 2010: 354

Marcelo Lubaszewski, Andrew Richardson, C. C. Su: Guest editorial. Microelectronics Journal 40(7): 1041 (2009)

Marcelo Lubaszewski: Can Functional Test Achieve Low-cost Full Coverage of NoC Faults? DFT 2009: 224-224

Caroline Concatto, Pedro Almeida, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski, Marcos Herve: Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults. IOLTS 2009: 61-66

Renato P. Ribas, S. Bavaresco, Marcelo Lubaszewski, André Inácio Reis: Efficient Test Circuit to Qualify Logic Cells. ISCAS 2009: 2733-2736

Marcos Herve, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski: Diagnosis of interconnect shorts in mesh NoCs. NOCS 2009: 256-265

Érika F. Cota, Luigi Carro, Felipe Pinto, Ricardo Augusto da Luz Reis, Marcelo Lubaszewski: Resource-and-time-aware test strategy for configurable quaternary logic blocks. SBCCI 2009

Luiz Fernando Gonçalves, Jefferson Luiz Bosa, Renato V. B. Henriques, Marcelo Lubaszewski: Design of an embedded system for the proactive maintenance of electrical valves. SBCCI 2009

Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, Maico Cassel, Marcos Herve, Pedro Almeida, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski: A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip. IEEE Trans. Computers 57(9): 1202-1215 (2008)

Bozena Kaminska, Marcelo Lubaszewski, José Machado da Silva: Selected Papers from the International Mixed Signals Testing and GHz/Gbps Test Workshop. VLSI Design 2008 (2008)

Carlos Roberto Moratelli, Felipe Ghellar, Érika F. Cota, Marcelo Lubaszewski: A fault-tolerant, DFA-resistant AES core. ISCAS 2008: 244-247

Felipe Ghellar, Marcelo Lubaszewski: A novel AES cryptographic core highly resistant to differential power analysis attacks. SBCCI 2008: 140-145

Marcelo Lubaszewski, Michel Renovell, Rajesh K. Gupta (Eds.): Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008. ACM 2008, isbn 978-1-60558-231-3

Marcelo Lubaszewski, Andrew Richardson, C. C. Su: Guest Editorial. J. Electronic Testing 23(6): 469 (2007)

Tiago R. Balen, José Vicente Calvano, Marcelo Lubaszewski, Michel Renovell: Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis. J. Electronic Testing 23(6): 497-512 (2007)

Alexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes: Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism. IET Computers & Digital Techniques 1(3): 197-206 (2007)

Tiago R. Balen, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Michel Renovell: Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation. ISVLSI 2007: 192-197

Érika F. Cota, Fernanda Lima Kastensmidt, Maico Cassel, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski: Redefining and testing interconnect faults in Mesh NoCs. ITC 2007: 1-10

Alexandre M. Amory, Frederico Ferlini, Marcelo Lubaszewski, Fernando Moraes: DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. VTS 2007: 435-440

Alexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno: Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture. CoRR abs/0710.4795 (2007)

Alexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes: Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism. European Test Symposium 2006: 213-218

Carlos Roberto Moratelli, Érika F. Cota, Marcelo Lubaszewski: A cryptography core tolerant to DFA fault attacks. SBCCI 2006: 190-195

Margrit R. Krug, Marcelo de Souza Moraes, Marcelo Lubaszewski: Using a software testing technique to identify registers for partial scan implementation. SBCCI 2006: 208-213

Margrit R. Krug, Marcelo Lubaszewski, Marcelo de Souza Moraes: Improving ATPG Gate-Level Fault Coverage by using Test Vectors generated from Behavioral HDL Descriptions. VLSI-SoC 2006: 314-319

Tiago R. Balen, José Vicente Calvano, Marcelo Lubaszewski, Michel Renovell: Functional Test of Field Programmable Analog Arrays. VTS 2006: 326-333

Florence Azaïs, Marcelo Lubaszewski, Pascal Nouet, Michel Renovell: A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters. J. Electronic Testing 21(1): 9-16 (2005)

Tiago R. Balen, Antonio Q. Andrade, Florence Azaïs, Marcelo Lubaszewski, Michel Renovell: Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks. J. Electronic Testing 21(2): 135-146 (2005)

Antonio Andrade Jr., Gustavo Vieira, Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell: Built-in self-test of global interconnects of field programmable analog arrays. Microelectronics Journal 36(12): 1112-1123 (2005)

Alexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno: Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture. DATE 2005: 62-63

Alexandre M. Amory, Eduardo Wenzel Brião, Érika F. Cota, Marcelo Lubaszewski, Fernando Gehm Moraes: A scalable test strategy for network-on-chip routers. ITC 2005: 9

Marcelo de Souza Moraes, Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski: A constraint-based solution for on-line testing of processors embedded in real-time applications. SBCCI 2005: 68-73

Gustavo Pereira, Antonio Andrade Jr., Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell: Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays. VTS 2005: 389-394

Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Alex Orailoglu: Searching for Global Test Costs Optimization in Core-Based Systems. J. Electronic Testing 20(4): 357-373 (2004)

Alex Gonsales, Marcelo Lubaszewski, Luigi Carro, Michel Renovell: A New FPGA for DSP Applications Integrating BIST Capabilities. J. Electronic Testing 20(4): 423-431 (2004)

Érika F. Cota, Luigi Carro, Marcelo Lubaszewski: Reusing an on-chip network for the test of core-based systems. ACM Trans. Design Autom. Electr. Syst. 9(4): 471-499 (2004)

Marcelo Lubaszewski, José Luis Huertas: Test and Design-for-Test of Mixed-Signal Integrated Circuits. IFIP Congress Tutorials 2004: 183-212

Tiago R. Balen, Antonio Andrade Jr., Florence Azaïs, Michel Renovell, Marcelo Lubaszewski: Testing the Configurable Analog Blocks of Field Programmable Analog Arrays. ITC 2004: 893-902

Antonio Andrade Jr., Érika F. Cota, Marcelo Lubaszewski: Improving mixed-signal SOC testing: a power-aware reuse-based approach with analog BIST. SBCCI 2004: 105-110

Alexandre M. Amory, Érika F. Cota, Marcelo Lubaszewski, Fernando Gehm Moraes: Reducing test time with processor reuse in network-on-chip based systems. SBCCI 2004: 111-116

Tiago R. Balen, Antonio Andrade Jr., Florence Azaïs, Marcelo Lubaszewski, Michel Renovell: An Approach to the Built-In Self-Test of Field Programmable Analog Arrays. VTS 2004: 383-388

L. Cassol, O. Betat, Luigi Carro, Marcelo Lubaszewski: The SigmaDelta-BIST Method Applied to Analog Filters. J. Electronic Testing 19(1): 13-20 (2003)

Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski: Power-aware NoC Reuse on the Testing of Core-based Systems. ITC 2003: 612-621

José Vicente Calvano, Marcelo Lubaszewski: Designing for Test Analog Signal Processors for MEMS-Based Inertial Sensors. IWSOC 2003: 251-256

Vinícius P. Correia, Marcelo Lubaszewski, André Inácio Reis: SIFU! - A Didactic Stuck-at Fault Simulator. MSE 2003: 93-94

Érika F. Cota, Márcio Eduardo Kreutz, Cesar Albenes Zeferino, Luigi Carro, Marcelo Lubaszewski, Altamiro Amadeu Susin: The Impact of NoC Reuse on the Testing of Core-based Systems. VTS 2003: 128-133

Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Alex Orailoglu: Test Planning and Design Space Exploration in a Core-Based Environment. DATE 2002: 478-485

José Vicente Calvano, Vladimir Castro Alves, Antônio C. Mesquita, Marcelo Lubaszewski: Filters Designed for Testability Wrapped on the Mixed-Signal Test Bus. VTS 2002: 201-206

Marcelo Lubaszewski, Víctor H. Champac: Guest Editorial. J. Electronic Testing 17(2): 83-84 (2001)

José Vicente Calvano, Antonio Carneiro de Mesquita Filho, Vladimir Castro Alves, Marcelo Lubaszewski: Fault Models and Test Generation for OpAmp Circuits - The FFM. J. Electronic Testing 17(2): 121-138 (2001)

Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis: Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electronic Testing 17(2): 149-161 (2001)

Renato P. Ribas, André Inácio Reis, Marcelo Lubaszewski: Concepção de Circuitos e Sistemas Integrados. RITA 8(1): 7-21 (2001)

Luigi Carro, André C. Nácul, Daniel Janner, Marcelo Lubaszewski: Built-in Test of Analog Non-Linear Circuits in a SOC Environment. VLSI-SOC 2001: 437-448

Marcelo Lubaszewski, Salvador Mir, Vladimir Kolarik, C. Nielsen, Bernard Courtois: Design of self-checking fully differential circuits and boards. IEEE Trans. VLSI Syst. 8(2): 113-128 (2000)

Luigi Carro, Érika F. Cota, Marcelo Lubaszewski, Yves Bertrand, Florence Azaïs, Michel Renovell: TI-BIST: a temperature independent analog BIST for switched-capacitor filters. Asian Test Symposium 2000: 78-83

José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski: Testing a PWM circuit using functional fault models and compact test vectors for operational amplifiers. Asian Test Symposium 2000: 96-

Érika F. Cota, Michel Renovell, Florence Azaïs, Yves Bertrand, Luigi Carro, Marcelo Lubaszewski: Reuse of Existing Resources for Analog BIST of a Switch Capacitor Filte. DATE 2000: 226-230

José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski: Fault Detection Methodology and BIST Method for 2nd Order Butterworth, Chebyshev and Bessel Filter Approximations. VTS 2000: 319-324

Érika F. Cota, Luigi Carro, Marcelo Lubaszewski: A Method to Diagnose Faults in Linear Analog Circuits using an Adaptive Tester. DATE 1999: 184-188

Benoît Charlot, Salvador Mir, Érika F. Cota, Marcelo Lubaszewski, Bernard Courtois: Fault modeling of suspended thermal MEMS. ITC 1999: 319-328

Bernard Courtois, Jean-Michel Karam, Salvador Mir, Marcelo Lubaszewski, Vladimir Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner: Design and Test of MEMs. VLSI Design 1999: 270-

Vladimir Székely, Márta Rencz, Jean-Michel Karam, Marcelo Lubaszewski, Bernard Courtois: Thermal Monitoring of Self-Checking Systems. J. Electronic Testing 12(1-2): 81-92 (1998)

Marcelo Lubaszewski, Bernard Courtois: A Reliable Fail-Safe System. IEEE Trans. Computers 47(2): 236-241 (1998)

Jaime Velasco-Medina, Marcelo Lubaszewski, Michael Nicolaidis: An Approach to the On-Line Testing of Operational Amplifiers. Asian Test Symposium 1998: 290-295

Marcelo Lubaszewski: Bridging the Gap between Microelectronics and Micromechanics Testing. Asian Test Symposium 1998: 513

Marcelo Lubaszewski, Érika F. Cota, Bernard Courtois: Microsystems Testing: an Approach and Open Problems. DATE 1998: 524-528

Jean-Michel Karam, Marcelo Lubaszewski, S. Blanton, Andrew Richardson: Testing MEMS. VTS 1998: 320-321

Érika F. Cota, José Di Elias Domênico, Marcelo Lubaszewski: A CAT Tool for Frequency-domain Testing and Diagnosis on Analog. J. Braz. Comp. Soc. 4(2) (1997)

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois: Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets. J. Electronic Testing 9(1-2): 43-57 (1996)

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois: Unified built-in self-test for fully differential analog circuits. J. Electronic Testing 9(1-2): 135-151 (1996)

Vladimir Székely, Márta Rencz, Jean-Michel Karam, Marcelo Lubaszewski, Bernard Courtois: Thermal Monitoring Of Safety-Critical Integrated Systems. Asian Test Symposium 1996: 282-288

Marcelo Lubaszewski, Salvador Mir, Leandro Pulz: ABILBO: Analog BuILt-in Block Observer. ICCAD 1996: 600-603

Vladimir Kolarik, Salvador Mir, Marcelo Lubaszewski, Bernard Courtois: Analog checkers with absolute and relative tolerances. IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 607-612 (1995)

Khaled Saab, Bozena Kaminska, Bernard Courtois, Marcelo Lubaszewski: Frequency-based BIST for analog circuit testin. VTS 1995: 54-59

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, C. Nielsen, Bernard Courtois: Built-in self-test and fault diagnosis of fully differential analogue circuits. ICCAD 1994: 486-490

Vladimir Kolarik, Marcelo Lubaszewski, Bernard Courtois: Designing self-exercising analogue checkers. VTS 1994: 252-257

Meryem Marzouki, Marcelo Lubaszewski, Mohamed Hedi Touati: Unifying test and diagnosis of interconnects and logic clusters in partial boundary scan boards. ICCAD 1993: 654-657

Marcelo Lubaszewski, Bernard Courtois: On the Design of Self-Checking Boundary Scannable Boards. ITC 1992: 372-381