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 | 2011 | |
|---|---|---|
| j7 |      | Chi-Keung Luk, Ryan Newton, William Hasenplaugh, Mark Hampton, Geoff Lowney: A Synergetic Approach to Throughput Computing on x86-Based Multicore Desktops. IEEE Software 28(1): 39-50 (2011) |
| c13 | | Yuan Tang, Rezaul Alam Chowdhury, Bradley C. Kuszmaul, Chi-Keung Luk, Charles E. Leiserson: The pochoir stencil compiler. SPAA 2011: 117-128 |
| 2010 | ||
| j6 | | Moshe Bach, Mark Charney, Robert Cohn, Elena Demikhovsky, Tevi Devor, Kim M. Hazelwood, Aamer Jaleel, Chi-Keung Luk, Gail Lyons, Harish Patil, Ady Tal: Analyzing Parallel Programs with Pin. IEEE Computer 43(3): 34-41 (2010) |
| c12 | | Minjang Kim, Hyesoon Kim, Chi-Keung Luk: SD3: A Scalable Approach to Dynamic Data-Dependence Profiling. MICRO 2010: 535-546 |
| 2009 | ||
| c11 | | Chi-Keung Luk, Sunpyo Hong, Hyesoon Kim: Qilin: exploiting parallelism on heterogeneous multiprocessors with adaptive mapping. MICRO 2009: 45-55 |
| 2007 | ||
| c10 | | Prashanth P. Bungale, Chi-Keung Luk: PinOS: a programmable framework for whole-system dynamic instrumentation. VEE 2007: 137-147 |
| 2005 | ||
| j5 | | Heidi Pan, Krste Asanovic, Robert Cohn, Chi-Keung Luk: Controlling program execution through binary instrumentation. SIGARCH Computer Architecture News 33(5): 45-50 (2005) |
| c9 | | Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood: Pin: building customized program analysis tools with dynamic instrumentation. PLDI 2005: 190-200 |
| 2004 | ||
| c8 | | Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney: Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture. CGO 2004: 15-26 |
| 2002 | ||
| j4 | | Joel S. Emer, Pritpal S. Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan: Asim: A Performance Model Framework. IEEE Computer 35(2): 68-76 (2002) |
| c7 | | Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn: Profile-guided post-link stride prefetching. ICS 2002: 167-178 |
| 2001 | ||
| j3 | | Chi-Keung Luk, Todd C. Mowry: Architectural and compiler support for effective instruction prefetching: a cooperative approach. ACM Trans. Comput. Syst. 19(1): 71-109 (2001) |
| c6 | | Chi-Keung Luk: Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors. ISCA 2001: 40-51 |
| 2000 | ||
| j2 | | Todd C. Mowry, Chi-Keung Luk: Understanding Why Correlation Profiling Improves the Predictability of Data Cache Misses in Nonnumeric Applications. IEEE Trans. Computers 49(4): 369-384 (2000) |
| 1999 | ||
| j1 | | Chi-Keung Luk, Todd C. Mowry: Automatic Compiler-Inserted Prefetching for Pointer-Based Applications. IEEE Trans. Computers 48(2): 134-141 (1999) |
| c5 | | Chi-Keung Luk, Todd C. Mowry: Memory Forwarding: Enabling Aggressive Layout Optimizations by Guaranteeing the Safety of Data Relocation. ISCA 1999: 88-99 |
| 1998 | ||
| c4 | | Chi-Keung Luk, Todd C. Mowry: Cooperative Prefetching: Compiler and Hardware Support for Effective Instruction Prefetching in Modern Processors. MICRO 1998: 182-194 |
| 1997 | ||
| c3 | | Todd C. Mowry, Chi-Keung Luk: Predicting Data Cache Misses in Non-Numeric Applications through Correlation Profiling. MICRO 1997: 314-320 |
| 1996 | ||
| c2 | | Chi-Keung Luk, Todd C. Mowry: Compiler-Based Prefetching for Recursive Data Structures. ASPLOS 1996: 222-233 |
| 1995 | ||
| c1 | | |
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