Igor L. Markov

Smita Krishnaswamy, Igor L. Markov, John P. Hayes: Design, Analysis and Test of Logic Circuits Under Uncertainty. Lecture Notes in Electrical Engineering 115, Springer 2013, isbn 978-90-481-9643-2, pp. 1-120

David A. Papa, Igor L. Markov: Multi-Objective Optimization in Physical Synthesis of Integrated Circuits. Lecture Notes in Electrical Engineering 166, Springer 2013, isbn 978-1-4614-1355-4, pp. 3-155

Mehdi Saeedi, Igor L. Markov: Synthesis and optimization of reversible circuits - a survey. ACM Comput. Surv. 45(2): 21 (2013)

Yida Yao, MyungBo Kim, Jianmin Li, Igor L. Markov, Farinaz Koushanfar: ClockPUF: physical unclonable functions based on clock networks. DATE 2013: 422-427

Igor L. Markov, Mehdi Saeedi: Faster Quantum Number Factoring via Circuit Synthesis. CoRR abs/1301.3210 (2013)

Mehdi Saeedi, Igor L. Markov: Quantum Circuits for GCD Computation with $O(n \log n)$ Depth and O(n) Ancillae. CoRR abs/1304.7516 (2013)

Igor L. Markov, Mehdi Saeedi: Constant-optimized quantum circuits for modular multiplication and exponentiation. Quantum Information & Computation 12(5-6): 361-394 (2012)

Myung-Chul Kim, Dongjin Lee, Igor L. Markov: SimPL: An Effective Placement Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 31(1): 50-60 (2012)

Dongjin Lee, Igor L. Markov: Obstacle-Aware Clock-Tree Shaping During Placement. IEEE Trans. on CAD of Integrated Circuits and Systems 31(2): 205-216 (2012)

Johann Knechtel, Igor L. Markov, Jens Lienig: Assembling 2-D Blocks Into 3-D Chips. IEEE Trans. on CAD of Integrated Circuits and Systems 31(2): 228-241 (2012)

Tim Güneysu, Igor L. Markov, André Weimerskirch: Securely Sealing Multi-FPGA Systems. ARC 2012: 276-289

Myung-Chul Kim, Igor L. Markov: ComPLx: A Competitive Primal-dual Lagrange Optimization for Global Placement. DAC 2012: 747-752

Kai-Hui Chang, Hong-Zu Chou, Igor L. Markov: RTL analysis and modifications for improving at-speed test. DATE 2012: 400-405

Jin Hu, Andrew B. Kahng, Seokhyeong Kang, Myung-Chul Kim, Igor L. Markov: Sensitivity-guided metaheuristics for accurate discrete gate sizing. ICCAD 2012: 233-239

Igor L. Markov, Jin Hu, Myung-Chul Kim: Progress and challenges in VLSI placement research. ICCAD 2012: 275-282

Johann Knechtel, Igor L. Markov, Jens Lienig, Matthias Thiele: Multiobjective optimization of deadspace, a critical resource for 3D-IC integration. ICCAD 2012: 705-712

Myung-Chul Kim, Natarajan Viswanathan, Charles J. Alpert, Igor L. Markov, Shyam Ramji: MAPLE: multilevel adaptive placement for mixed-size designs. ISPD 2012: 193-200

Hadi Katebi, Karem A. Sakallah, Igor L. Markov: Conflict Anticipation in the Search for Graph Automorphisms. LPAR 2012: 243-257

Igor L. Markov, Mehdi Saeedi: Constant-Optimized Quantum Circuits for Modular Multiplication and Exponentiation. CoRR abs/1202.6614 (2012)

Hadi Katebi, Karem A. Sakallah, Igor L. Markov: Conflict Anticipation in the Search for Graph Automorphisms. CoRR abs/1208.6269 (2012)

Hadi Katebi, Karem A. Sakallah, Igor L. Markov: Graph Symmetry Detection and Canonical Labeling: Differences and Synergies. CoRR abs/1208.6271 (2012)

Héctor J. Garcia, Igor L. Markov, Andrew W. Cross: Efficient Inner-product Algorithm for Stabilizer States. CoRR abs/1210.6646 (2012)

Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu: VLSI Physical Design - From Graph Partitioning to Timing Closure. Springer 2011, isbn 978-90-481-9590-9, pp. I-XI, 1-310

Igor L. Markov, Yaoyun Shi: Constant-Degree Graph Expansions that Preserve Treewidth. Algorithmica 59(4): 461-470 (2011)

Igor L. Markov: EDA: Synergy or sum of the parts? [review of "Electronic Design Automation: Synthesis, Verification and Test (Systems on Silicon" (Wang, L.-T., Eds., et al; 2009)]. IEEE Design & Test of Computers 28(1): 78-79 (2011)

Igor L. Markov: Getting Your Bits in Order. IEEE Design & Test of Computers 28(4): 98-101 (2011)

David A. Papa, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Natarajan Viswanathan, Gi-Joon Nam, Igor L. Markov: Physical Synthesis with Clock-Network Optimization for Large Systems on Chips. IEEE Micro 31(4): 51-62 (2011)

Dongjin Lee, Igor L. Markov: CONTANGO: Integrated Optimization of SoC Clock Networks. VLSI Design 2011 (2011)

Myung-Chul Kim, Jin Hu, Dongjin Lee, Igor L. Markov: A SimPLR method for routability-driven placement. ICCAD 2011: 67-73

Igor L. Markov, Dongjin Lee: Algorithmic tuning of clock trees and derived non-tree structures. ICCAD 2011: 279-282

Dongjin Lee, Igor L. Markov: Multilevel tree fusion for robust clock networks. ICCAD 2011: 632-639

Johann Knechtel, Igor L. Markov, Jens Lienig: Assembling 2D blocks into 3D chips. ISPD 2011: 81-88

Dongjin Lee, Igor L. Markov: Obstacle-aware clock-tree shaping during placement. ISPD 2011: 123-130

Fadi A. Aloul, Igor L. Markov, Arathi Ramani, Karem A. Sakallah: Breaking Instance-Independent Symmetries In Exact Graph Coloring. CoRR abs/1109.2347 (2011)

Mehdi Saeedi, Igor L. Markov: Synthesis and Optimization of Reversible Circuits - A Survey. CoRR abs/1110.2574 (2011)

Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov: Ending Piracy of Integrated Circuits. IEEE Computer 43(10): 30-38 (2010)

Igor L. Markov: Master numerical tasks with ease. IEEE Design & Test of Computers 27(1): 93-95 (2010)

Igor L. Markov: Chips in 3D. IEEE Design & Test of Computers 27(4): 68-69 (2010)

David A. Papa, Michael D. Moffitt, Charles J. Alpert, Igor L. Markov: Speeding Up Physical Synthesis with Transactional Timing Analysis. IEEE Design & Test of Computers 27(5): 14-25 (2010)

Shigeru Yamashita, Igor L. Markov: Fast equivalence - checking for quantum circuits. Quantum Information & Computation 10(9&10): 721-734 (2010)

Kai-Hui Chang, Valeria Bertacco, Igor L. Markov, Alan Mishchenko: Logic synthesis and circuit customization using extensive external don't-cares. ACM Trans. Design Autom. Electr. Syst. 15(3) (2010)

Raj R. Nadakuditi, Igor L. Markov: On the costs and benefits of stochasticity in stream processing. DAC 2010: 320-325

Héctor J. Garcia, Igor L. Markov: Spinto: High-performance energy minimization in spin glasses. DATE 2010: 160-165

Hadi Katebi, Igor L. Markov: Large-scale Boolean matching. DATE 2010: 771-776

Dongjin Lee, Igor L. Markov: Contango: Integrated optimization of SoC clock networks. DATE 2010: 1468-1473

David A. Papa, Smita Krishnaswamy, Igor L. Markov: SPIRE: A retiming-based physical-synthesis transformation system. ICCAD 2010: 373-380

Dongjin Lee, Myung-Chul Kim, Igor L. Markov: Low-power clock trees for CPUs. ICCAD 2010: 444-451

Myung-Chul Kim, Dongjin Lee, Igor L. Markov: SimPL: An effective placement algorithm. ICCAD 2010: 649-656

Jin Hu, Jarrod A. Roy, Igor L. Markov: Completing high-quality global routes. ISPD 2010: 35-41

Hadi Katebi, Karem A. Sakallah, Igor L. Markov: Symmetry and Satisfiability: An Update. SAT 2010: 113-127

George F. Viamontes, Igor L. Markov, John P. Hayes: Quantum Circuit Simulation. Springer 2009, isbn 978-90-481-3064-1, pp. I-X, 1-190

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Functional Design Errors in Digital Circuits - Diagnosis, Correction and Repair. Lecture Notes in Electrical Engineering 32, Springer 2009, isbn 978-1-4020-9364-7, pp. 3-185

Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Dynamic symmetry-breaking for Boolean satisfiability. Ann. Math. Artif. Intell. 57(1): 59-73 (2009)

Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: Incremental Verification with Error Detection, Diagnosis, and Visualization. IEEE Design & Test of Computers 26(2): 34-43 (2009)

Igor L. Markov: Book Review: A physical-design picture book. IEEE Design & Test of Computers 26(4): 100-101 (2009)

Jarrod A. Roy, Aaron N. Ng, Rajat Aggarwal, Venky Ramachandran, Igor L. Markov: Solving modern mixed-size placement instances. Integration 42(2): 262-275 (2009)

Vivek V. Shende, Igor L. Markov: On the CNOT-cost of TOFFOLI gates. Quantum Information & Computation 9(5): 461-486 (2009)

Smita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes: Signature-Based SER Analysis and Design of Logic Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 74-86 (2009)

Smita Krishnaswamy, Igor L. Markov, John P. Hayes: Improving testability and soft-error resilience through retiming. DAC 2009: 508-513

Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Customizing IP cores for system-on-chip designs using extensive external don't-cares. DATE 2009: 582-585

Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: CRISP: Congestion reduction by iterated spreading during placement. ICCAD 2009: 357-362

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating Postsilicon Debugging and Repair. IEEE Computer 41(7): 47-54 (2008)

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: SafeResynth: A new technique for physical synthesis. Integration 41(4): 544-556 (2008)

Ketan N. Patel, Igor L. Markov, John P. Hayes: Optimal synthesis of linear reversible circuits. Quantum Information & Computation 8(3): 282-294 (2008)

Igor L. Markov, Yaoyun Shi: Simulating Quantum Computation by Contracting Tensor Networks. SIAM J. Comput. 38(3): 963-981 (2008)

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors With Counterexamples and Resynthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 184-188 (2008)

Jarrod A. Roy, Igor L. Markov: High-Performance Routing at the Nanometer Scale. IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1066-1077 (2008)

Stephen Plaza, Igor L. Markov, Valeria Bertacco: Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2107-2119 (2008)

David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2156-2168 (2008)

Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Probabilistic transfer matrices in symbolic reliability analysis of logic circuits. ACM Trans. Design Autom. Electr. Syst. 13(1) (2008)

Michael D. Moffitt, Jarrod A. Roy, Igor L. Markov, Martha E. Pollack: Constraint-driven floorplan repair. ACM Trans. Design Autom. Electr. Syst. 13(4) (2008)

Jarrod A. Roy, David A. Papa, Igor L. Markov: Fine Control of Local Whitespace in Placement. VLSI Design 2008 (2008)

Paul T. Darga, Karem A. Sakallah, Igor L. Markov: Faster symmetry discovery using sparsity of symmetries. DAC 2008: 149-154

Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov: Protecting bus-based hardware IP by secret sharing. DAC 2008: 846-851

Smita Krishnaswamy, Igor L. Markov, John P. Hayes: On the role of timing masking in reliable logic circuit design. DAC 2008: 924-929

Stephen Plaza, Igor L. Markov, Valeria Bertacco: Random Stimulus Generation using Entropy and XOR Constraints. DATE 2008: 664-669

Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov: EPIC: Ending Piracy of Integrated Circuits. DATE 2008: 1069-1074

Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov: Circuit CAD Tools as a Security Threat. HOST 2008: 65-66

Jae-sun Seo, Igor L. Markov, Dennis Sylvester, David Blaauw: On the decreasing significance of large standard cells in technology mapping. ICCAD 2008: 116-121

David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm. ISPD 2008: 2-9

Stephen Plaza, Igor L. Markov, Valeria Bertacco: Optimizing non-monotonic interconnect using functional simulation and logic restructuring. ISPD 2008: 95-102

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Reap what you sow: spare cells for post-silicon metal fix. ISPD 2008: 103-110

Michael D. Moffitt, Jarrod A. Roy, Igor L. Markov: The coming of age of (academic) global routing. ISPD 2008: 148-155

Jin Hu, Jarrod A. Roy, Igor L. Markov: Sidewinder: a scalable ILP-based router. SLIP 2008: 73-80

Andrew A. Kennings, Igor L. Markov: Circuit Placement. Encyclopedia of Algorithms 2008

Smita Krishnaswamy, Igor L. Markov, John P. Hayes: Tracking Uncertainty with Probabilistic Logic Circuit Testing. IEEE Design & Test of Computers 24(4): 312-321 (2007)

Igor L. Markov, Louis Scheffer, Dirk Stroobandt: Special issue on System-Level Interconnect Prediction. Integration 40(4): 381 (2007)

Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Symmetry breaking for pseudo-Boolean formulas. ACM Journal of Experimental Algorithmics 12 (2007)

Fadi A. Aloul, Arathi Ramani, Karem A. Sakallah, Igor L. Markov: Solution and Optimization of Systems of Pseudo-Boolean Constraints. IEEE Trans. Computers 56(10): 1415-1424 (2007)

Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-Based Bug Trace Minimization With BMC-Based Refinement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 152-165 (2007)

Jarrod A. Roy, Igor L. Markov: Seeing the Forest and the Trees: Steiner Wirelength Optimization in Placement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 632-644 (2007)

Jarrod A. Roy, Igor L. Markov: ECO-System: Embracing the Change in Placement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2173-2185 (2007)

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Postplacement rewiring by exhaustive search for functional symmetries. ACM Trans. Design Autom. Electr. Syst. 12(3) (2007)

Jarrod A. Roy, Igor L. Markov: ECO-system: Embracing the Change in Placement. ASP-DAC 2007: 147-152

Stephen Plaza, Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Node Mergers in the Presence of Don't Cares. ASP-DAC 2007: 414-419

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Safe Delay Optimization for Physical Synthesis. ASP-DAC 2007: 628-633

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors with Counterexamples and Resynthesis. ASP-DAC 2007: 944-949

Kai-Hui Chang, Ilya Wagner, Valeria Bertacco, Igor L. Markov: Automatic error diagnosis and correction for RTL designs. HLDVT 2007: 65-72

George F. Viamontes, Igor L. Markov, John P. Hayes: Checking equivalence of quantum circuits and states. ICCAD 2007: 69-74

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating post-silicon debugging and repair. ICCAD 2007: 91-98

Smita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes: Enhancing design robustness with reliability-aware resynthesis and logic simulation. ICCAD 2007: 149-154

Jarrod A. Roy, Igor L. Markov: High-performance routing at the nanometer scale. ICCAD 2007: 496-502

Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization. ISQED 2007: 487-494

Igor L. Markov, Yaoyun Shi: Constant-degree graph expansions that preserve the treewidth. CoRR abs/0707.3622 (2007)

Krysta Marie Svore, Alfred V. Aho, Andrew W. Cross, Isaac L. Chuang, Igor L. Markov: A Layered Software Architecture for Quantum Computing Design Tools. IEEE Computer 39(1): 74-83 (2006)

Saurabh N. Adya, Igor L. Markov, Paul G. Villarrubia: On whitespace and stability in physical synthesis. Integration 39(4): 340-362 (2006)

Arathi Ramani, Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul: Breaking Instance-Independent Symmetries In Exact Graph Coloring. J. Artif. Intell. Res. (JAIR) 26: 289-322 (2006)

Aditya K. Prasad, Vivek V. Shende, Igor L. Markov, John P. Hayes, Ketan N. Patel: Data structures and algorithms for simplifying reversible circuits. JETC 2(4): 277-293 (2006)

Fadi A. Aloul, Karem A. Sakallah, Igor L. Markov: Efficient Symmetry Breaking for Boolean Satisfiability. IEEE Trans. Computers 55(5): 549-558 (2006)

Vivek V. Shende, Stephen S. Bullock, Igor L. Markov: Synthesis of quantum-logic circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1000-1010 (2006)

Jarrod A. Roy, Saurabh N. Adya, David A. Papa, Igor L. Markov: Min-cut floorplacement. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1313-1326 (2006)

David A. Papa, Igor L. Markov, Philip Chong: Utility of the OpenAccess database in academic research. ASP-DAC 2006: 440-441

Michael D. Moffitt, Aaron N. Ng, Igor L. Markov, Martha E. Pollack: Constraint-driven floorplan repair. DAC 2006: 1103-1108

Ramashis Das, Igor L. Markov, John P. Hayes: On-Chip Test Generation Using Linear Subspaces. European Test Symposium 2006: 111-116

Jarrod A. Roy, James F. Lu, Igor L. Markov: Seeing the forest and the trees: Steiner wirelength optimization in placemen. ISPD 2006: 78-85

Aaron N. Ng, Igor L. Markov, Rajat Aggarwal, Venky Ramachandran: Solving hard instances of floorplacement. ISPD 2006: 170-177

Jarrod A. Roy, David A. Papa, Aaron N. Ng, Igor L. Markov: Satisfying whitespace requirements in top-down placement. ISPD 2006: 206-208

DoRon B. Motter, Jarrod A. Roy, Igor L. Markov: Resolution cannot polynomially simulate compressed-BFS. Ann. Math. Artif. Intell. 44(1-2): 121-156 (2005)

Vivek V. Shende, Igor L. Markov: Quantum circuits for incompletely specified two-qubit operators. Quantum Information & Computation 5(1): 49-57 (2005)

George F. Viamontes, Igor L. Markov, John P. Hayes: Graph-based simulation of quantum computation in the density matrix representation. Quantum Information & Computation 5(2): 113-130 (2005)

Saurabh N. Adya, Igor L. Markov: Combinatorial techniques for mixed-size placement. ACM Trans. Design Autom. Electr. Syst. 10(1): 58-90 (2005)

Vivek V. Shende, Stephen S. Bullock, Igor L. Markov: Synthesis of quantum logic circuits. ASP-DAC 2005: 272-275

Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Dynamic symmetry-breaking for improved Boolean optimization. ASP-DAC 2005: 445-450

Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices. DATE 2005: 282-287

Igor L. Markov, Dmitri Maslov: Uniformly-Switching Logic for Cryptographic Hardware. DATE 2005: 432-433

Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Post-placement rewiring and rebuffering by exhaustive search for functional symmetries. ICCAD 2005: 56-63

Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-based bug trace minimization with BMC-based refinement. ICCAD 2005: 1045-1051

Zhong Xiu, David A. Papa, Philip Chong, Christoph Albrecht, Andreas Kuehlmann, Rob A. Rutenbar, Igor L. Markov: Early research experience with OpenAccess gear: an open source development environment for physical design. ISPD 2005: 94-100

Hayward H. Chan, Saurabh N. Adya, Igor L. Markov: Are floorplan representations important in digital design? ISPD 2005: 129-136

Jarrod A. Roy, David A. Papa, Saurabh N. Adya, Hayward H. Chan, Aaron N. Ng, James F. Lu, Igor L. Markov: Capo: robust and scalable open-source min-cut floorplacer. ISPD 2005: 224-226

Aaron N. Ng, Igor L. Markov: Toward Quality EDA Tools and Tool Flows Through High-Performance Computing. ISQED 2005: 22-27

Igor L. Markov, Mike Hutton (Eds.): The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings. ACM 2005, isbn 1-59593-033-7

Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: MINCE: A Static Global Variable-Ordering Heuristic for SAT Search and BDD Manipulation. J. UCS 10(12): 1562-1596 (2004)

Stephen S. Bullock, Igor L. Markov: Asymptotically optimal circuits for arbitrary n-qubit diagonal comutations. Quantum Information & Computation 4(1): 27-47 (2004)

Saurabh N. Adya, Mehmet Can Yildiz, Igor L. Markov, Paul Villarrubia, Phiroze N. Parakh, Patrick H. Madden: Benchmarking for large-scale placement and beyond. IEEE Trans. on CAD of Integrated Circuits and Systems 23(4): 472-487 (2004)

Ketan N. Patel, John P. Hayes, Igor L. Markov: Fault testing for reversible circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1220-1230 (2004)

Ketan N. Patel, Igor L. Markov: Error-correction and crosstalk avoidance in DSM busses. IEEE Trans. VLSI Syst. 12(10): 1076-1080 (2004)

Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: ShatterPB: symmetry-breaking for pseudo-Boolean formulas. ASP-DAC 2004: 883-886

Arathi Ramani, Igor L. Markov: Automatically Exploiting Symmetries in Constraint Programming. CSCLP 2004: 98-112

Yoonna Oh, Maher N. Mneimneh, Zaher S. Andraus, Karem A. Sakallah, Igor L. Markov: AMUSE: a minimally-unsatisfiable subformula extractor. DAC 2004: 518-523

Paul T. Darga, Mark H. Liffiton, Karem A. Sakallah, Igor L. Markov: Exploiting structure in symmetry detection for CNF. DAC 2004: 530-534

Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Breaking Instance-Independent Symmetries in Exact Graph Coloring. DATE 2004: 324-331

Vivek V. Shende, Igor L. Markov, Stephen S. Bullock: Smaller Two-Qubit Circuits for Quantum Communication and Computation. DATE 2004: 980-987

Andrew B. Kahng, Igor L. Markov, Sherief Reda: Boosting: Min-Cut Placement with Improved Signal Delay. DATE 2004: 1098-1103

George F. Viamontes, Igor L. Markov, John P. Hayes: High-Performance QuIDD-Based Simulation of Quantum Circuits. DATE 2004: 1354-1355

David A. Papa, Saurabh N. Adya, Igor L. Markov: Constructive benchmarking for placement. ACM Great Lakes Symposium on VLSI 2004: 113-118

Andrew B. Kahng, Igor L. Markov, Sherief Reda: On legalization of row-based placements. ACM Great Lakes Symposium on VLSI 2004: 214-219

Hayward H. Chan, Igor L. Markov: Practical slicing and non-slicing block-packing without simulated annealing. ACM Great Lakes Symposium on VLSI 2004: 282-287

Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov: Unification of partitioning, placement and floorplanning. ICCAD 2004: 550-557

Louis Scheffer, Igor L. Markov (Eds.): The Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), Paris, France, February 14-15, 2004, Proceedings. ACM 2004, isbn 1-58113-818-0

Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes: Synthesis of reversible logic circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 710-722 (2003)

Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Solving difficult instances of Boolean satisfiability in the presence of symmetry. IEEE Trans. on CAD of Integrated Circuits and Systems 22(9): 1117-1137 (2003)

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hierarchical whitespace allocation in top-down placement. IEEE Trans. on CAD of Integrated Circuits and Systems 22(11): 1550-1556 (2003)

Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: Improved a priori interconnect predictions and technology extrapolation in the GTX system. IEEE Trans. VLSI Syst. 11(1): 3-14 (2003)

Saurabh N. Adya, Igor L. Markov: Fixed-outline floorplanning: enabling hierarchical design. IEEE Trans. VLSI Syst. 11(6): 1120-1135 (2003)

George F. Viamontes, Manoj Rajagopalan, Igor L. Markov, John P. Hayes: Gate-level simulation of quantum circuits. ASP-DAC 2003: 295-301

Stephen S. Bullock, Igor L. Markov: An arbitrary twoqubit computation In 23 elementary gates or less. DAC 2003: 324-329

Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Shatter: efficient symmetry-breaking for boolean satisfiability. DAC 2003: 836-839

Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: FORCE: a fast and easy-to-implement variable-ordering heuristic. ACM Great Lakes Symposium on VLSI 2003: 116-119

Saurabh N. Adya, Igor L. Markov, Paul Villarrubia: On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis. ICCAD 2003: 311-319

Fadi A. Aloul, Karem A. Sakallah, Igor L. Markov: Efficient Symmetry Breaking for Boolean Satisfiability. IJCAI 2003: 271-276

Arathi Ramani, Igor L. Markov: Combining Two Local Search Approaches to Hypergraph Partitioning. IJCAI 2003: 1546-

Saurabh N. Adya, Mehmet Can Yildiz, Igor L. Markov, Paul Villarrubia, Phiroze N. Parakh, Patrick H. Madden: Benchmarking for large-scale placement and beyond. ISPD 2003: 95-103

Andrew B. Kahng, Igor L. Markov: Impact of Interoperability on CAD-IP Reuse: An Academic Viewpoint. ISQED 2003: 208-213

Ketan N. Patel, Igor L. Markov: Error-correction and crosstalk avoidance in DSM busses. SLIP 2003: 9-14

Ketan N. Patel, John P. Hayes, Igor L. Markov: Fault Testing for Reversible Circuits. VTS 2003: 410-416

Andrew E. Caldwell, Igor L. Markov: Toward CAD-IP Reuse: A Web Bookshelf of Fundamental Algorithms. IEEE Design & Test of Computers 19(3): 72-81 (2002)

DoRon B. Motter, Igor L. Markov: A Compressed Breadth-First Search for Satisfiability. ALENEX 2002: 29-42

Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Solving difficult SAT instances in the presence of symmetry. DAC 2002: 731-736

Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes: Reversible logic circuit synthesis. ICCAD 2002: 353-360

Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Generic ILP versus specialized 0-1 ILP: an update. ICCAD 2002: 450-457

Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Improving the Efficiency of Circuit-to-BDD Conversion by Gate and Input Ordering. ICCD 2002: 64-69

Saurabh N. Adya, Igor L. Markov: Consistent placement of macro-blocks using floorplanning and standard-cell placement. ISPD 2002: 12-17

Andrew B. Kahng, Stefanus Mantik, Igor L. Markov: Min-max placement for large-scale timing optimization. ISPD 2002: 143-148

Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes: Reversible Logic Circuit Synthesis. IWLS 2002: 125-130

Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Efficient Gate and Input Ordering for Circuit-to-BDD Conversion. IWLS 2002: 137-142

DoRon B. Motter, Igor L. Markov: Overcoming Resolution-Based Lower Bounds for SAT Solvers. IWLS 2002: 373-378

Andrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Constraint-based watermarking techniques for design IP protection. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1236-1252 (2001)

Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Faster SAT and Smaller BDDs via Common Function Structure. ICCAD 2001: 443-448

Saurabh N. Adya, Igor L. Markov: Fixed-outline Floorplanning through Better Local Search. ICCD 2001: 328-334

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Design and Implementation of Move-Based Heuristics for VLSI Hypergraph Partitioning. ACM Journal of Experimental Algorithmics 5: 5 (2000)

Charles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hypergraph partitioning with fixed vertices [VLSI CAD]. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 267-272 (2000)

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Optimal partitioners and end-case placers for standard-cell layout. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1304-1313 (2000)

Andrew A. Kennings, Igor L. Markov: Analytical minimization of half-perimeter wirelength. ASP-DAC 2000: 179-184

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Improved algorithms for hypergraph bipartitioning. ASP-DAC 2000: 661-666

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Can recursive bisection alone produce routable placements? DAC 2000: 477-482

Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farinaz Koushanfar, Hua Lu, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: GTX: the MARCO GSRC technology extrapolation system. DAC 2000: 693-698

Olivier Coudert, Igor L. Markov, Christoph Meinel, Ellen Sentovich: Web-based frameworks to enable CAD RD (abstract). DAC 2000: 711

Andrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1265-1278 (1999)

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning. ALENEX 1999: 177-193

Ross Baldick, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov: Function Smoothing with Applications to VLSI Layout. ASP-DAC 1999: 225-

Andrew E. Caldwell, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov: Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting. DAC 1999: 349-354

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hypergraph Partitioning with Fixed Vertices. DAC 1999: 355-359

Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Optimal partitioners and end-case placers for standard-cell layout. ISPD 1999: 90-96

Charles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Partitioning with terminals: a "new" problem and new benchmarks. ISPD 1999: 151-157

Charles J. Alpert, Tony F. Chan, Andrew B. Kahng, Igor L. Markov, Pep Mulet: Faster minimization of linear wirelength for global placement. IEEE Trans. on CAD of Integrated Circuits and Systems 17(1): 3-13 (1998)

Andrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Watermarking Techniques for Intellectual Property Protection. DAC 1998: 776-781

Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Robust IP Watermarking Methodologies for Physical Design. DAC 1998: 782-787

Andrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. ISPD 1998: 4-11

Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huang, Igor L. Markov, Kenneth Yan: Quadratic Placement Revisited. DAC 1997: 752-757

Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huang, Andrew B. Kahng, Igor L. Markov, Pep Mulet, Kenneth Yan: Faster minimization of linear wirelength for global placement. ISPD 1997: 4-11