Akira Matsuzawa

Hyunui Lee, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa: A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation. IEICE Transactions 96-A(2): 422-433 (2013)

Fei Li, Masaya Miyahara, Akira Matsuzawa: Design of CMOS Low-Noise Analog Circuits for Particle Detector Pixel Readout LSIs. IEICE Transactions 96-C(4): 568-576 (2013)

Ahmed Musa, Kenichi Okada, Akira Matsuzawa: A Study of Stability and Phase Noise of Tail Capacitive-Feedback VCOs. IEICE Transactions 96-C(4): 577-585 (2013)

Kenichi Okada, Keitarou Kondou, Masaya Miyahara, Masashi Shinagawa, Hiroki Asada, Ryo Minami, Tatsuya Yamaguchi, Ahmed Musa, Yuuki Tsukui, Yasuo Asakura, Shinya Tamonoki, Hiroyuki Yamagishi, Yasufumi Hino, Takahiro Sato, Hironori Sakaguchi, Naoki Shimasaki, Toshihiko Ito, Yasuaki Takeuchi, Ning Li, Qinghong Bu, Rui Murakami, Keigo Bunsen, Kota Matsushita, Makoto Noda, Akira Matsuzawa: Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry. J. Solid-State Circuits 48(1): 46-65 (2013)

Wei Deng, Kenichi Okada, Akira Matsuzawa: Class-C VCO With Amplitude Feedback Loop for Robust Start-Up and Enhanced Oscillation Swing. J. Solid-State Circuits 48(2): 429-440 (2013)

Seitaro Kawai, Ryo Minami, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Yuuki Tsukui, Kenichi Okada, Akira Matsuzawa: A full 4-channel 60 GHz direct-conversion transceiver. ASP-DAC 2013: 95-96

Teerachot Siriburanon, Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa: A sub-harmonic injection-locked frequency synthesizer with frequency calibration scheme for use in 60GHz TDD transceivers. ASP-DAC 2013: 97-98

Wei Deng, Ahmed Musa, Kenichi Okada, Akira Matsuzawa: A fractional-N harmonic injection-locked frequency synthesizer with 10MHz-6.6GHz quadrature outputs for software-defined radios. ASP-DAC 2013: 99-100

Wei Deng, Ahmed Musa, Teerachot Siriburanon, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa: A 0.022mm² 970µW dual-loop injection-locked PLL with -243dB FOM using synthesizable all-digital PVT calibration circuits. ISSCC 2013: 248-249

Jee Young Hong, Daisuke Imanishi, Kenichi Okada, Akira Matsuzawa: Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning. IEICE Transactions 95-C(2): 290-296 (2012)

Daehwa Paik, Masaya Miyahara, Akira Matsuzawa: An Analysis on a Dynamic Amplifier and Calibration Methods for a Pseudo-Differential Dynamic Comparator. IEICE Transactions 95-A(2): 456-470 (2012)

Ning Li, Keigo Bunsen, Naoki Takayama, Qinghong Bu, Toshihide Suzuki, Masaru Sato, Yoichi Kawano, Tatsuya Hirose, Kenichi Okada, Akira Matsuzawa: A 24 dB Gain 51-68 GHz Common Source Low Noise Amplifier Using Asymmetric-Layout Transistors. IEICE Transactions 95-A(2): 498-505 (2012)

Kenichi Okada, You Nomiyama, Rui Murakami, Akira Matsuzawa: A Dual-Conduction Class-C VCO for a Low Supply Voltage. IEICE Transactions 95-A(2): 506-514 (2012)

Qinghong Bu, Ning Li, Kenichi Okada, Akira Matsuzawa: Evaluation of L-2L De-Embedding Method Considering Misalignment of Contact Position for Millimeter-Wave CMOS Circuit Design. IEICE Transactions 95-C(5): 942-948 (2012)

Hong Phuc Ninh, Masaya Miyahara, Akira Matsuzawa: A 83-dB SFDR 10-MHz Bandwidth Continuous-Time Delta-Sigma Modulator Employing a One-Element-Shifting Dynamic Element Matching. IEICE Transactions 95-C(6): 1017-1025 (2012)

Wei Deng, Kenichi Okada, Akira Matsuzawa: A 0.5-V, 0.05-to-3.2 GHz LC-Based Clock Generator for Substituting Ring Oscillators under Low-Voltage Condition. IEICE Transactions 95-C(7): 1285-1296 (2012)

Toshihiko Ito, Kenichi Okada, Akira Matsuzawa: A Wideband Common-Gate Low-Noise Amplifier Using Capacitive Feedback. IEICE Transactions 95-C(10): 1666-1674 (2012)

Toshihiko Ito, Masaki Kanemaru, Satoshi Furuya, Dong Ta Ngoc Huy, Kenichi Okada, Akira Matsuzawa: Inter-Stage Tunable Notch Filter for a Multi-Band WCDMA Receiver. IEICE Transactions 95-C(11): 1776-1782 (2012)

Yuji Gendai, Akira Matsuzawa: A Specific Distortion Pattern of Flash ADCs Identified by Discriminating Time-Domain Analysis. IEEE T. Instrumentation and Measurement 61(2): 316-325 (2012)

Ryo Minami, Hiroki Asada, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Win Chaivipas, Kenichi Okada, Akira Matsuzawa: A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS. ASP-DAC 2012: 467-468

Ahmed Musa, Kenichi Okada, Akira Matsuzawa: A Progressive Mixing 20GHz ILFD with wide locking range for higher division ratios. ASP-DAC 2012: 559-560

Wei Deng, Kenichi Okada, Akira Matsuzawa: A PVT-robust feedback class-C VCO using an oscillation swing enhancement technique. ASP-DAC 2012: 563-564

Wei Deng, Teerachot Siriburanon, Ahmed Musa, Kenichi Okada, Akira Matsuzawa: A 58.1-to-65.0GHz frequency synthesizer with background calibration for millimeter-wave TDD transceivers. ESSCIRC 2012: 201-204

Kenichi Okada, Keitarou Kondou, Masaya Miyahara, Masashi Shinagawa, Hiroki Asada, Ryo Minami, Tatsuya Yamaguchi, Ahmed Musa, Yuuki Tsukui, Yasuo Asakura, Shinya Tamonoki, Hiroyuki Yamagishi, Yasufumi Hino, Takahiro Sato, Hironori Sakaguchi, Naoki Shimasaki, Toshihiko Ito, Yasuaki Takeuchi, Ning Li, Qinghong Bu, Rui Murakami, Keigo Bunsen, Kota Matsushita, Makoto Noda, Akira Matsuzawa: A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry. ISSCC 2012: 218-220

Ryo Minami, Jee Young Hong, Kenichi Okada, Akira Matsuzawa: Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip. IEICE Transactions 94-C(6): 1057-1060 (2011)

Jee Young Hong, Daisuke Imanishi, Kenichi Okada, Akira Matsuzawa: Tunable CMOS Power Amplifiers for Reconfigurable Transceivers. IEICE Transactions 94-A(11): 2394-2401 (2011)

Ning Li, Qinghong Bu, Kota Matsushita, Naoki Takayama, Shogo Ito, Kenichi Okada, Akira Matsuzawa: Topology and Design Considerations of 60 GHz CMOS LNAs for Noise Performance Improving. IEICE Transactions 94-C(12): 1881-1888 (2011)

Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa: A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications. J. Solid-State Circuits 46(11): 2635-2649 (2011)

Kenichi Okada, Ning Li, Kota Matsushita, Keigo Bunsen, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Shogo Ito, Win Chaivipas, Ryo Minami, Tatsuya Yamaguchi, Yasuaki Takeuchi, Hiroyuki Yamagishi, Makoto Noda, Akira Matsuzawa: A 60-GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE802.15.3c. J. Solid-State Circuits 46(12): 2988-3004 (2011)

Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa: A 58-63.6GHz quadrature PLL frequency synthesizer using dual-injection technique. ASP-DAC 2011: 101-102

Wei Deng, Kenichi Okada, Akira Matsuzawa: An ultra-low-voltage LC-VCO with a frequency extension circuit for future 0.5-V clock generation. ASP-DAC 2011: 103-104

Wei Deng, Kenichi Okada, Akira Matsuzawa: A feedback class-C VCO with robust startup condition over PVT variations and enhanced oscillation swing. ESSCIRC 2011: 499-502

James Lin, Masaya Miyahara, Akira Matsuzawa: A 15.5 dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique. ISCAS 2011: 21-24

Kenichi Okada, Kota Matsushita, Keigo Bunsen, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Ning Li, Shogo Ito, Win Chaivipas, Ryo Minami, Akira Matsuzawa: A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE 802.15.3c. ISSCC 2011: 160-162

Daehwa Paik, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa: An 8-Bit 600-MSps Flash ADC Using Interpolating and Background Self-Calibrating Techniques. IEICE Transactions 93-A(2): 402-414 (2010)

Shoichi Hara, Rui Murakami, Kenichi Okada, Akira Matsuzawa: The Optimum Design Methodology of Low-Phase-Noise LC-VCO Using Multiple-Divide Technique. IEICE Transactions 93-A(2): 424-430 (2010)

Ning Li, Kota Matsushita, Naoki Takayama, Shogo Ito, Kenichi Okada, Akira Matsuzawa: Evaluation of a Multi-Line De-Embedding Technique up to 110 GHz for Millimeter-Wave CMOS Circuit Design. IEICE Transactions 93-A(2): 431-439 (2010)

Shoichi Hara, Kenichi Okada, Akira Matsuzawa: A Wide-Tunable LC-Based Voltage-Controlled Oscillator Using a Divide-by-N Injection-Locked Frequency Divider. IEICE Transactions 93-C(6): 763-769 (2010)

Rui Murakami, Shoichi Hara, Kenichi Okada, Akira Matsuzawa: Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators. IEICE Transactions 93-C(6): 777-784 (2010)

Naoki Takayama, Kota Matsushita, Shogo Ito, Ning Li, Keigo Bunsen, Kenichi Okada, Akira Matsuzawa: A De-Embedding Method Using Different-Length Transmission Lines for mm-Wave CMOS Device Modeling. IEICE Transactions 93-C(6): 812-819 (2010)

Yasuhide Kuramochi, Masayuki Kawabata, Koichiro Uekusa, Akira Matsuzawa: A Self-Calibration Technique for Capacitor Mismatch Errors of an Interleaved SAR ADC. IEICE Transactions 93-C(11): 1630-1637 (2010)

Kazuo Matsukawa, Yosuke Mitani, Masao Takayama, Koji Obata, Shiro Dosho, Akira Matsuzawa: A Fifth-Order Continuous-Time Delta-Sigma Modulator With Single-Opamp Resonator. J. Solid-State Circuits 45(4): 697-706 (2010)

Daisuke Imanishi, Jee Young Hong, Kenichi Okada, Akira Matsuzawa: A 2-6 GHz fully integrated tunable CMOS power amplifier for multi-standard transmitters. ASP-DAC 2010: 351-352

Naoki Takayama, Kota Matsushita, Shogo Ito, Ning Li, Kenichi Okada, Akira Matsuzawa: A 60GHz direct-conversion transmitter in 65nm CMOS technology. ASP-DAC 2010: 363-364

Yasuhide Kuramochi, Akira Matsuzawa, Masayuki Kawabata: A 0.027-mm² Self-Calibrating Successive Approximation ADC Core in 0.18-µm CMOS. IEICE Transactions 92-A(2): 360-366 (2009)

Christian Jesús B. Fayomi, Gilson I. Wirth, David M. Binkley, Akira Matsuzawa: An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS. ICECS 2009: 195-198

Kaziiya Kojima, Yasuhiro Toriyama, Toru Taniguchi, Masaya Miyahara, Akira Matsuzawa: Development of baseband processing SoC with ultrahigh-speed QAM modem and broadband radio system for demonstration experiment thereof. ICECS 2009: 687-690

Masaya Miyahara, Akira Matsuzawa: A Performance Model for the Design of Pipelined ADCs with Consideration of Overdrive Voltage and Slewing. IEICE Transactions 91-A(2): 469-475 (2008)

Kunihiko Iizuka, Masato Koutani, Takeshi Mitsunaka, Hiroshi Kawamura, Shinji Toyoyama, Masayuki Miyamoto, Akira Matsuzawa: RF Variable-Gain Amplifiers and AGC Loops for Digital TV Receivers. IEICE Transactions 91-C(6): 854-861 (2008)

Ning Li, Win Chaivipas, Kenichi Okada, Akira Matsuzawa: Analysis of CMOS Transconductance Amplifiers for Sampling Mixers. IEICE Transactions 91-C(6): 871-878 (2008)

Win Chaivipas, Kenichi Okada, Akira Matsuzawa: Spatial Sensitivity of Capacitors in Distributed Resonators and Its Application to Fine and Wide Frequency Tuning Digital Controlled Oscillators. IEICE Transactions 91-C(6): 918-927 (2008)

Akira Matsuzawa: Digital-Centric RF CMOS Technologies. IEICE Transactions 91-C(11): 1720-1725 (2008)

Hong Phuc Ninh, Takashi Moue, Takashi Kurashina, Kenichi Okada, Akira Matsuzawa: A CMOS direct sampling mixer using Switched Capacitor Filter technique for software-defined radio. ASP-DAC 2008: 103-104

Christian Jesús B. Fayomi, Gilson I. Wirth, Jaime Ramírez-Angulo, Akira Matsuzawa: "The flipped voltage follower"-based low voltage fully differential CMOS sample-and-hold circuit. ISCAS 2008: 1716-1719

Shoichi Hara, Takeshi Ito, Kenichi Okada, Akira Matsuzawa: Design space exploration of low-phase-noise LC-VCO using multiple-divide technique. ISCAS 2008: 1966-1969

Akira Matsuzawa: Design Challenges of Analog-to-Digital Converters in Nanoscale CMOS. IEICE Transactions 90-C(4): 779-785 (2007)

Win Chaivipas, Akira Matsuzawa: Analysis and Design of Direct Reference Feed-Forward Compensation for Fast-Settling All-Digital Phase-Locked Loop. IEICE Transactions 90-C(4): 793-801 (2007)

Masaya Miyahara, Akira Matsuzawa: The Effects of Switch Resistances on Pipelined ADC Performances and the Optimization for the Settling Time. IEICE Transactions 90-C(6): 1165-1171 (2007)

Yusuke Ikeda, Akira Matsuzawa: Digital Calibration Method for Binary-Weighted Current-Steering D/A-Converters without Calibration ADC. IEICE Transactions 90-C(6): 1172-1180 (2007)

Philipus Chandra Oh, Akira Matsuzawa, Win Chaivipas: A Study on Fully Digital Clock Data Recovery Utilizing Time to Digital Converter. IEICE Transactions 90-C(6): 1311-1314 (2007)

Akira Matsuzawa: Analog IC Technologies for Future Wireless Systems. IEICE Transactions 89-C(4): 446-454 (2006)

Win Chaivipas, Akira Matsuzawa, Philipus Chandra Oh: Feedforward compensation technique for all digital phase locked loop based synthesizers. ISCAS 2006

Akira Matsuzawa: How to make efficient communication, collaboration, and optimization from system to chip. DAC 2003: 417-418

Akira Matsuzawa: Driving the SoC developments for digital consumer electronics. ESTImedia 2003: 5-7

Dwi Handoko, Shoji Kawahito, Yoshiaki Tadokoro, Akira Matsuzawa: Low-power motion vector estimation using iterative search block-matching methods and a high-speed non-destructive CMOS image sensor. IEEE Trans. Circuits Syst. Video Techn. 12(12): 1084-1092 (2002)

Akira Matsuzawa: High Quality Analog CMOS and Mixed Signal LSI Design. ISQED 2001: 97-104

Shoji Kawahito, Makoto Yoshida, Masaaki Sasaki, Daisuke Miyazaki, Yoshiaki Tadokoro, Kenji Murata, Shiro Doushou, Akira Matsuzawa: A CMOS Smart Image Sensor LSI for Focal-Plane Compression. ASP-DAC 1998: 339-340

Shoji Kawahito, Yoshiaki Tadokoro, Akira Matsuzawa: CMOS Image Sensors with Video Compression. ASP-DAC 1998: 595-600

Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira Matsuzawa: A 0.5 V single power supply operated high-speed boosted and offset-grounded data storage (BOGS) SRAM cell architecture. IEEE Trans. VLSI Syst. 5(4): 377-387 (1997)

Kenneth P. Parker, John E. McDermid, Rodney A. Browen, Kozo Nuriya, Katsuhiro Hirayama, Akira Matsuzawa: Design, Fabrications and Use of Mixed-Signal IC Testability Structures. ITC 1997: 489-498

Hiroyuki Yamauchi, Toru Iwata, Hironori Akamatsu, Akira Matsuzawa: A 0.5V/100 MHz over-VCC grounded data storage (OVGS) SRAM cell architecture with boosted bit-line and offset source over-driving schemes. ISLPED 1996: 49-54