DBLP: David W. Matula

	2012
j26		Dhia Mahjoub, David W. Matula: Constructing efficient rotating backbones in wireless sensor networks using graph coloring. Computer Communications 35(9): 1086-1097 (2012)
	2011
c57		David W. Matula, Mihai T. Panu: A Prescale-Lookup-Postscale Additive Procedure for Obtaining a Single Precision Ulp Accurate Reciprocal. IEEE Symposium on Computer Arithmetic 2011: 177-183
	2010
c56		Dhia Mahjoub, David W. Matula: Employing (1 - epsilon) Dominating Set Partitions as Backbones in Wireless Sensor Networks. ALENEX 2010: 98-111
c55		Dhia Mahjoub, Angelika Leskovskaya, David W. Matula: Approximating the independent domatic partition problem in random geometric graphs - an experimental study. CCCG 2010: 195-198
c54		Dhia Mahjoub, David W. Matula: Building (1 - epsilon) Dominating Sets Partition as Backbones in Wireless Sensor Networks Using Distributed Graph Coloring. DCOSS 2010: 144-157
	2009
j25		Alex Fit-Florea, Lun Li, Mitchell A. Thornton, David W. Matula: A Discrete Logarithm Number System for Integer Arithmetic Modulo 2^k: Algorithms and Lookup Structures. IEEE Trans. Computers 58(2): 163-174 (2009)
c53		David W. Matula: Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding. IEEE Symposium on Computer Arithmetic 2009: 39-47
c52		Satyendra R. Datla, Mitchell A. Thornton, David W. Matula: A Low Power High Performance Radix-4 Approximate Squaring Circuit. ASAP 2009: 91-97
c51		Dhia Mahjoub, David W. Matula: Experimental Study of Independent and Dominating Sets in Wireless Sensor Networks Using Graph Coloring Algorithms. WASA 2009: 32-42
	2008
c50		David W. Matula: Foundations of Higher Radix Numeric Computation. ISMVL 2008: 124
c49		Mitchell A. Thornton, David W. Matula, Laura Spenner, D. Michael Miller: Quantum Logic Implementation of Unary Arithmetic Operations. ISMVL 2008: 202-207
	2006
c48		Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions. ASAP 2006: 99-104
c47		David W. Matula, Lee D. McFearin: A formal model and efficient traversal algorithm for generating testbenches for verification of IEEE standard floating point division. DATE 2006: 1134-1138
c46		Lun Li, Mitchell A. Thornton, David W. Matula: A digit serial algorithm for the integer power operation. ACM Great Lakes Symposium on VLSI 2006: 302-307
	2005
j24		Peter-Michael Seidel, Lee D. McFearin, David W. Matula: Secondary Radix Recodings for Higher Radix Multipliers. IEEE Trans. Computers 54(2): 111-123 (2005)
c45		Alex Fit-Florea, David W. Matula: Determining all pairs edge connectivity of a 4-regular graph in O(\|V\|). AICCSA 2005: 15
c44		David W. Matula, Alex Fit-Florea, Mitchell Aaron Thornton: Table Lookup Structures for Multiplicative Inverses Modulo 2^k. IEEE Symposium on Computer Arithmetic 2005: 156-163
c43		Peter Kornerup, David W. Matula: Single Precision Reciprocals by Multipartite Table Lookup. IEEE Symposium on Computer Arithmetic 2005: 240-248
c42		Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2^k. ISVLSI 2005: 130-135
	2004
c41		Alex Fit-Florea, David W. Matula: A Digit-Serial Algorithm for the Discrete Logarithm Modulo 2^k. ASAP 2004: 236-246
	2003
j23		David W. Matula, Lee D. McFearin: A p×p bit fraction model of binary floating point division and extremal rounding cases. Theor. Comput. Sci. 291(2): 159-182 (2003)
j22		Marc Daumas, David W. Matula: Further Reducing the Redundancy of a Notation Over a Minimally Redundant Digit Set. VLSI Signal Processing 33(1-2): 7-18 (2003)
c40		David W. Matula: Computer Arithmetic - An Algorithm Engineer?s Perspective. IEEE Symposium on Computer Arithmetic 2003: 2-
c39		David W. Matula, Alex Fit-Florea: Prescaled Integer Division. IEEE Symposium on Computer Arithmetic 2003: 63-
	2002
j21		Mihaela Iridon, David W. Matula: Regular Triangulated Toroidal Graphs with Applications to Cellular and Interconnection Networks. J. Graph Algorithms Appl. 6(4): 373-404 (2002)
c38		David W. Matula, Alex Fit-Florea, Lee D. McFearin: Evaluating Products of Non Linear Functions by Indirect Bipartite Table Lookup. ASAP 2002: 120-129
	2001
j20		Mihaela Iridon, David W. Matula, Cheng Yang: A Graph Theoretic Approach for Channel Assignment in Cellular Networks. Wireless Networks 7(6): 567-574 (2001)
c37		Peter-Michael Seidel, Lee D. McFearin, David W. Matula: Binary Multiplication Radix-32 and Radix-256. IEEE Symposium on Computer Arithmetic 2001: 23-32
c36		David W. Matula: Improved Table Lookup Algorithms for Postscaled Division. IEEE Symposium on Computer Arithmetic 2001: 101-
c35		Lee D. McFearin, David W. Matula: Generation and Analysis of Hard to Round Cases for Binary Floating Point Division. IEEE Symposium on Computer Arithmetic 2001: 119-127
c34		Lee D. McFearin, David W. Matula: Selecting A Well Distributed Hard Case Test Suite for IEEE Standard Floating Point Division. ICCD 2001: 89-97
	2000
j19		Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even: An IEEE Compliant Floating-Point Adder that Conforms with the Pipelined Packet-Forwarding Paradigm. IEEE Trans. Computers 49(1): 33-47 (2000)
j18		Milos D. Ercegovac, Laurent Imbert, David W. Matula, Jean-Michel Muller, Guoheng Wei: Improving Goldschmidt Division, Square Root, and Square Root Reciprocal. IEEE Trans. Computers 49(7): 759-763 (2000)
c33		Marc Daumas, David W. Matula: A Booth Multiplier Accepting Both a Redundant or a Non-Redundant Input with No Additional Delay. ASAP 2000: 205-214
	1999
j17		Abbas Edalat, David W. Matula, Philipp Sünderhauf: Preface. Electr. Notes Theor. Comput. Sci. 24: 1 (1999)
j16		Cristina Iordache, David W. Matula: Analysis of Reciprocal and Square Root Reciprocal Instructions in the AMD K6-2 Implementation of 3DNow! Electr. Notes Theor. Comput. Sci. 24: 34-62 (1999)
c32		Cristina Iordache, David W. Matula: On Infinitely Precise Rounding for Division, Square Root, Reciprocal and Square Root Reciprocal. IEEE Symposium on Computer Arithmetic 1999: 233-240
c31		Hakki C. Cankaya, David W. Matula, Mihaela Iridon: Performance Analysis of a Graph Model for Channel Assignment in a Cellular Network. COMPSAC 1999: 239-240
	1998
c30		Mihaela Iridon, David W. Matula: Symmetric Cellular Network Embeddings on a Torus. ICCCN 1998: 732-736
	1997
j15		Marc Daumas, David W. Matula: Validated Roundings of Dot Products by Sticky Accumulation. IEEE Trans. Computers 46(5): 623-629 (1997)
c29		Debjit Das Sarma, David W. Matula: Faithful Interpolation in Reciprocal Tables. IEEE Symposium on Computer Arithmetic 1997: 82-91
c28		David W. Matula, Asger Munk Nielsen: Pipelined Packet-Forwarding Floating Point: I. Foundations and a Rounder. IEEE Symposium on Computer Arithmetic 1997: 140-147
c27		Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even: Pipelined Packet-Forwarding Floating Point: II. An Adder. IEEE Symposium on Computer Arithmetic 1997: 148-155
	1995
j14		Peter Kornerup, David W. Matula: LCF: A Lexicagraphic Binary representation of the Rationals. J. UCS 1(7): 484-503 (1995)
c26		Debjit Das Sarma, David W. Matula: Faithful Bipartite ROM Reciprocal Tables. IEEE Symposium on Computer Arithmetic 1995: 17-
c25		Chung Nan Lyu, David W. Matula: Redundant Binary Booth Recoding. IEEE Symposium on Computer Arithmetic 1995: 50-
	1994
j13		Debjit Das Sarma, David W. Matula: Measuring the Accuracy of ROM Reciprocal Tables. IEEE Trans. Computers 43(8): 932-940 (1994)
	1993
c24		Marc Daumas, David W. Matula: Design of a fast validated dot product operation. IEEE Symposium on Computer Arithmetic 1993: 62-69
c23		Debjit Das Sarma, David W. Matula: Measuring the accuracy of ROM reciprocal tables. IEEE Symposium on Computer Arithmetic 1993: 95-102
c22		W. S. Briggs, David W. Matula: A 17 × 69 bit multiply and add unit with redundant binary feedback and single cycle latency. IEEE Symposium on Computer Arithmetic 1993: 163-170
c21		David W. Matula: A Linear Time 2+epsilon Approximation Algorithm for Edge Connectivity. SODA 1993: 500-504
	1991
c20		Gerd Bohlender, Wolfgang Walter, Peter Kornerup, David W. Matula: Semantics for exact floating point operations. IEEE Symposium on Computer Arithmetic 1991: 22-26
c19		Shrikant N. Parikh, David W. Matula: A redundant binary Euclidean GCD algorithm. IEEE Symposium on Computer Arithmetic 1991: 220-225
	1990
j12		David W. Matula, Farhad Shahrokhi: Sparsest cuts and bottlenecks in graphs. Discrete Applied Mathematics 27(1-2): 113-123 (1990)
j11		Farhad Shahrokhi, David W. Matula: The Maximum Concurrent Flow Problem. J. ACM 37(2): 318-334 (1990)
j10		Peter Kornerup, David W. Matula: An Algorithm for Redundant Binary Bit-Pipelined Rational Arithmetic. IEEE Trans. Computers 39(8): 1106-1115 (1990)
c18		David W. Matula: Design of a highly parallel IEEE standard floating point unit: the Cyrix 83D87 coprocessor. SPDP 1990: 334
	1989
c17		Peter Kornerup, David W. Matula: Exploiting redundancy in bit-pipelined rational arithmetic. IEEE Symposium on Computer Arithmetic 1989: 119-126
	1988
j9		Peter Kornerup, David W. Matula: An On-Line Arithmetic Unit for Bit-Pipelined Rational Arithmetic. J. Parallel Distrib. Comput. 5(3): 310-330 (1988)
	1987
j8		David W. Matula: Expose-and-merge exploration and the chromatic number of random graph. Combinatorica 7(3): 275-284 (1987)
c16		Farhad Shahrokhi, David W. Matula: On solving large maximum concurrent flow problems. ACM Conference on Computer Science 1987: 205-209
c15		Peter Kornerup, David W. Matula: A bit-serial arithmetic unit for rational arithmetic. IEEE Symposium on Computer Arithmetic 1987: 204-211
c14		David W. Matula: Determining Edge Connectivity in O(nm). FOCS 1987: 249-251
	1986
c13		Jit Biswas, David W. Matula: Two Flow Routing Algorithms for the Maximum Concurrent-Flow Problem. FJCC 1986: 629-636
	1985
j7		David W. Matula, Peter Kornerup: Finite Precision Rational Arithmetic Slash Number Systems. IEEE Trans. Computers 34(1): 3-18 (1985)
c12		Peter Kornerup, David W. Matula: Finite precision lexicographic continued fraction number systems. IEEE Symposium on Computer Arithmetic 1985: 207-213
	1983
j6		David W. Matula, Leland L. Beck: Smallest-Last Ordering and clustering and Graph Coloring Algorithms. J. ACM 30(3): 417-427 (1983)
j5		Peter Kornerup, David W. Matula: Finite Precision Rational Arithmetic: An Arithmetic Unit. IEEE Trans. Computers 32(4): 378-388 (1983)
c11		David W. Matula, Peter Kornerup: An order preserving finite binary encoding of the rationals. IEEE Symposium on Computer Arithmetic 1983: 201-209
	1982
j4		David W. Matula: Basic digit sets for radix representation. J. ACM 29(4): 1131-1143 (1982)
	1981
c10		Peter Kornerup, David W. Matula: An integrated rational arithmetic unit. IEEE Symposium on Computer Arithmetic 1981: 233-240
	1979
c9		David W. Matula, Peter Kornerup: An approximate rational arithmetic system with intrinsic recovery of simple fractions during expression evaluation. EUROSAM 1979: 383-397
	1978
j3		David W. Matula: k-Blocks and ultrablocks in graphs. J. Comb. Theory, Ser. B 24(1): 1-13 (1978)
c8		David W. Matula: Basic digit sets for radix representation of the integers. IEEE Symposium on Computer Arithmetic 1978: 1-9
c7		David W. Matula, Peter Kornerup: A feasibility analysis of binary fixed-slash and floating-slash number systems. IEEE Symposium on Computer Arithmetic 1978: 29-38
c6		Peter Kornerup, David W. Matula: A feasibility analysis of fixed-slash rational arithmetic. IEEE Symposium on Computer Arithmetic 1978: 39-47
	1975
c5		David W. Matula: Fixed-slash and floating-slash rational arithmetic. IEEE Symposium on Computer Arithmetic 1975: 90-91
c4		Robert T. Gregory, David W. Matula: Base conversion in residue number systems. IEEE Symposium on Computer Arithmetic 1975: 117-125
e1		T. R. N. Rao, David W. Matula (Eds.): 3rd IEEE Symposium on Computer Arithmetic, ARITH 1975, Dallas, TX, USA, November 19-20, 1975. IEEE 1975
	1972
j2		David W. Matula: Bounded color functions on graphs. Networks 2(1): 29-44 (1972)
c3		John D. Marasa, David W. Matula: A simulative study of correlated error propagation in various finite arithmetics. IEEE Symposium on Computer Arithmetic 1972: 1-44
	1971
c2		David W. Matula: Significant Digits: Numerical Analysis or Numerology. IFIP Congress (2) 1971: 1278-1283
	1968
j1		David W. Matula: In-and-out conversions. Commun. ACM 11(1): 47-50 (1968)
	1967
c1		David W. Matula: Base conversion mappings. AFIPS Spring Joint Computing Conference 1967: 311-318

2012

j26

Dhia Mahjoub, David W. Matula: Constructing efficient rotating backbones in wireless sensor networks using graph coloring. Computer Communications 35(9): 1086-1097 (2012)

2011

c57

David W. Matula, Mihai T. Panu: A Prescale-Lookup-Postscale Additive Procedure for Obtaining a Single Precision Ulp Accurate Reciprocal. IEEE Symposium on Computer Arithmetic 2011: 177-183

2010

c56

Dhia Mahjoub, David W. Matula: Employing (1 - epsilon) Dominating Set Partitions as Backbones in Wireless Sensor Networks. ALENEX 2010: 98-111

c55

Dhia Mahjoub, Angelika Leskovskaya, David W. Matula: Approximating the independent domatic partition problem in random geometric graphs - an experimental study. CCCG 2010: 195-198

c54

Dhia Mahjoub, David W. Matula: Building (1 - epsilon) Dominating Sets Partition as Backbones in Wireless Sensor Networks Using Distributed Graph Coloring. DCOSS 2010: 144-157

2009

j25

Alex Fit-Florea, Lun Li, Mitchell A. Thornton, David W. Matula: A Discrete Logarithm Number System for Integer Arithmetic Modulo 2^k: Algorithms and Lookup Structures. IEEE Trans. Computers 58(2): 163-174 (2009)

c53

David W. Matula: Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding. IEEE Symposium on Computer Arithmetic 2009: 39-47

c52

Satyendra R. Datla, Mitchell A. Thornton, David W. Matula: A Low Power High Performance Radix-4 Approximate Squaring Circuit. ASAP 2009: 91-97

c51

Dhia Mahjoub, David W. Matula: Experimental Study of Independent and Dominating Sets in Wireless Sensor Networks Using Graph Coloring Algorithms. WASA 2009: 32-42

2008

c50

David W. Matula: Foundations of Higher Radix Numeric Computation. ISMVL 2008: 124

c49

Mitchell A. Thornton, David W. Matula, Laura Spenner, D. Michael Miller: Quantum Logic Implementation of Unary Arithmetic Operations. ISMVL 2008: 202-207

2006

c48

Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions. ASAP 2006: 99-104

c47

David W. Matula, Lee D. McFearin: A formal model and efficient traversal algorithm for generating testbenches for verification of IEEE standard floating point division. DATE 2006: 1134-1138

c46

Lun Li, Mitchell A. Thornton, David W. Matula: A digit serial algorithm for the integer power operation. ACM Great Lakes Symposium on VLSI 2006: 302-307

2005

j24

Peter-Michael Seidel, Lee D. McFearin, David W. Matula: Secondary Radix Recodings for Higher Radix Multipliers. IEEE Trans. Computers 54(2): 111-123 (2005)

c45

Alex Fit-Florea, David W. Matula: Determining all pairs edge connectivity of a 4-regular graph in O(|V|). AICCSA 2005: 15

c44

David W. Matula, Alex Fit-Florea, Mitchell Aaron Thornton: Table Lookup Structures for Multiplicative Inverses Modulo 2^k. IEEE Symposium on Computer Arithmetic 2005: 156-163

c43

Peter Kornerup, David W. Matula: Single Precision Reciprocals by Multipartite Table Lookup. IEEE Symposium on Computer Arithmetic 2005: 240-248

c42

Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2^k. ISVLSI 2005: 130-135

2004

c41

Alex Fit-Florea, David W. Matula: A Digit-Serial Algorithm for the Discrete Logarithm Modulo 2^k. ASAP 2004: 236-246

2003

j23

David W. Matula, Lee D. McFearin: A p×p bit fraction model of binary floating point division and extremal rounding cases. Theor. Comput. Sci. 291(2): 159-182 (2003)

j22

Marc Daumas, David W. Matula: Further Reducing the Redundancy of a Notation Over a Minimally Redundant Digit Set. VLSI Signal Processing 33(1-2): 7-18 (2003)

c40

David W. Matula: Computer Arithmetic - An Algorithm Engineer?s Perspective. IEEE Symposium on Computer Arithmetic 2003: 2-

c39

David W. Matula, Alex Fit-Florea: Prescaled Integer Division. IEEE Symposium on Computer Arithmetic 2003: 63-

2002

j21

Mihaela Iridon, David W. Matula: Regular Triangulated Toroidal Graphs with Applications to Cellular and Interconnection Networks. J. Graph Algorithms Appl. 6(4): 373-404 (2002)

c38

David W. Matula, Alex Fit-Florea, Lee D. McFearin: Evaluating Products of Non Linear Functions by Indirect Bipartite Table Lookup. ASAP 2002: 120-129

2001

j20

Mihaela Iridon, David W. Matula, Cheng Yang: A Graph Theoretic Approach for Channel Assignment in Cellular Networks. Wireless Networks 7(6): 567-574 (2001)

c37

Peter-Michael Seidel, Lee D. McFearin, David W. Matula: Binary Multiplication Radix-32 and Radix-256. IEEE Symposium on Computer Arithmetic 2001: 23-32

c36

David W. Matula: Improved Table Lookup Algorithms for Postscaled Division. IEEE Symposium on Computer Arithmetic 2001: 101-

c35

Lee D. McFearin, David W. Matula: Generation and Analysis of Hard to Round Cases for Binary Floating Point Division. IEEE Symposium on Computer Arithmetic 2001: 119-127

c34

Lee D. McFearin, David W. Matula: Selecting A Well Distributed Hard Case Test Suite for IEEE Standard Floating Point Division. ICCD 2001: 89-97

2000

j19

Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even: An IEEE Compliant Floating-Point Adder that Conforms with the Pipelined Packet-Forwarding Paradigm. IEEE Trans. Computers 49(1): 33-47 (2000)

j18

Milos D. Ercegovac, Laurent Imbert, David W. Matula, Jean-Michel Muller, Guoheng Wei: Improving Goldschmidt Division, Square Root, and Square Root Reciprocal. IEEE Trans. Computers 49(7): 759-763 (2000)

c33

Marc Daumas, David W. Matula: A Booth Multiplier Accepting Both a Redundant or a Non-Redundant Input with No Additional Delay. ASAP 2000: 205-214

1999

j17

Abbas Edalat, David W. Matula, Philipp Sünderhauf: Preface. Electr. Notes Theor. Comput. Sci. 24: 1 (1999)

j16

Cristina Iordache, David W. Matula: Analysis of Reciprocal and Square Root Reciprocal Instructions in the AMD K6-2 Implementation of 3DNow! Electr. Notes Theor. Comput. Sci. 24: 34-62 (1999)

c32

Cristina Iordache, David W. Matula: On Infinitely Precise Rounding for Division, Square Root, Reciprocal and Square Root Reciprocal. IEEE Symposium on Computer Arithmetic 1999: 233-240

c31

Hakki C. Cankaya, David W. Matula, Mihaela Iridon: Performance Analysis of a Graph Model for Channel Assignment in a Cellular Network. COMPSAC 1999: 239-240

1998

c30

Mihaela Iridon, David W. Matula: Symmetric Cellular Network Embeddings on a Torus. ICCCN 1998: 732-736

1997

j15

Marc Daumas, David W. Matula: Validated Roundings of Dot Products by Sticky Accumulation. IEEE Trans. Computers 46(5): 623-629 (1997)

c29

Debjit Das Sarma, David W. Matula: Faithful Interpolation in Reciprocal Tables. IEEE Symposium on Computer Arithmetic 1997: 82-91

c28

David W. Matula, Asger Munk Nielsen: Pipelined Packet-Forwarding Floating Point: I. Foundations and a Rounder. IEEE Symposium on Computer Arithmetic 1997: 140-147

c27

Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even: Pipelined Packet-Forwarding Floating Point: II. An Adder. IEEE Symposium on Computer Arithmetic 1997: 148-155

1995

j14

Peter Kornerup, David W. Matula: LCF: A Lexicagraphic Binary representation of the Rationals. J. UCS 1(7): 484-503 (1995)

c26

Debjit Das Sarma, David W. Matula: Faithful Bipartite ROM Reciprocal Tables. IEEE Symposium on Computer Arithmetic 1995: 17-

c25

Chung Nan Lyu, David W. Matula: Redundant Binary Booth Recoding. IEEE Symposium on Computer Arithmetic 1995: 50-

1994

j13

Debjit Das Sarma, David W. Matula: Measuring the Accuracy of ROM Reciprocal Tables. IEEE Trans. Computers 43(8): 932-940 (1994)

1993

c24

Marc Daumas, David W. Matula: Design of a fast validated dot product operation. IEEE Symposium on Computer Arithmetic 1993: 62-69

c23

Debjit Das Sarma, David W. Matula: Measuring the accuracy of ROM reciprocal tables. IEEE Symposium on Computer Arithmetic 1993: 95-102

c22

W. S. Briggs, David W. Matula: A 17 × 69 bit multiply and add unit with redundant binary feedback and single cycle latency. IEEE Symposium on Computer Arithmetic 1993: 163-170

c21

David W. Matula: A Linear Time 2+epsilon Approximation Algorithm for Edge Connectivity. SODA 1993: 500-504

1991

c20

Gerd Bohlender, Wolfgang Walter, Peter Kornerup, David W. Matula: Semantics for exact floating point operations. IEEE Symposium on Computer Arithmetic 1991: 22-26

c19

Shrikant N. Parikh, David W. Matula: A redundant binary Euclidean GCD algorithm. IEEE Symposium on Computer Arithmetic 1991: 220-225

1990

j12

David W. Matula, Farhad Shahrokhi: Sparsest cuts and bottlenecks in graphs. Discrete Applied Mathematics 27(1-2): 113-123 (1990)

j11

Farhad Shahrokhi, David W. Matula: The Maximum Concurrent Flow Problem. J. ACM 37(2): 318-334 (1990)

j10

Peter Kornerup, David W. Matula: An Algorithm for Redundant Binary Bit-Pipelined Rational Arithmetic. IEEE Trans. Computers 39(8): 1106-1115 (1990)

c18

David W. Matula: Design of a highly parallel IEEE standard floating point unit: the Cyrix 83D87 coprocessor. SPDP 1990: 334

1989

c17

Peter Kornerup, David W. Matula: Exploiting redundancy in bit-pipelined rational arithmetic. IEEE Symposium on Computer Arithmetic 1989: 119-126

1988

Peter Kornerup, David W. Matula: An On-Line Arithmetic Unit for Bit-Pipelined Rational Arithmetic. J. Parallel Distrib. Comput. 5(3): 310-330 (1988)

1987

David W. Matula: Expose-and-merge exploration and the chromatic number of random graph. Combinatorica 7(3): 275-284 (1987)

c16

Farhad Shahrokhi, David W. Matula: On solving large maximum concurrent flow problems. ACM Conference on Computer Science 1987: 205-209

c15

Peter Kornerup, David W. Matula: A bit-serial arithmetic unit for rational arithmetic. IEEE Symposium on Computer Arithmetic 1987: 204-211

c14

David W. Matula: Determining Edge Connectivity in O(nm). FOCS 1987: 249-251

1986

c13

Jit Biswas, David W. Matula: Two Flow Routing Algorithms for the Maximum Concurrent-Flow Problem. FJCC 1986: 629-636

1985

David W. Matula, Peter Kornerup: Finite Precision Rational Arithmetic Slash Number Systems. IEEE Trans. Computers 34(1): 3-18 (1985)

c12

Peter Kornerup, David W. Matula: Finite precision lexicographic continued fraction number systems. IEEE Symposium on Computer Arithmetic 1985: 207-213

1983

David W. Matula, Leland L. Beck: Smallest-Last Ordering and clustering and Graph Coloring Algorithms. J. ACM 30(3): 417-427 (1983)

Peter Kornerup, David W. Matula: Finite Precision Rational Arithmetic: An Arithmetic Unit. IEEE Trans. Computers 32(4): 378-388 (1983)

c11

David W. Matula, Peter Kornerup: An order preserving finite binary encoding of the rationals. IEEE Symposium on Computer Arithmetic 1983: 201-209

1982

David W. Matula: Basic digit sets for radix representation. J. ACM 29(4): 1131-1143 (1982)

1981

c10

Peter Kornerup, David W. Matula: An integrated rational arithmetic unit. IEEE Symposium on Computer Arithmetic 1981: 233-240

1979

David W. Matula, Peter Kornerup: An approximate rational arithmetic system with intrinsic recovery of simple fractions during expression evaluation. EUROSAM 1979: 383-397

1978

David W. Matula: k-Blocks and ultrablocks in graphs. J. Comb. Theory, Ser. B 24(1): 1-13 (1978)

David W. Matula: Basic digit sets for radix representation of the integers. IEEE Symposium on Computer Arithmetic 1978: 1-9

David W. Matula, Peter Kornerup: A feasibility analysis of binary fixed-slash and floating-slash number systems. IEEE Symposium on Computer Arithmetic 1978: 29-38

Peter Kornerup, David W. Matula: A feasibility analysis of fixed-slash rational arithmetic. IEEE Symposium on Computer Arithmetic 1978: 39-47

1975

David W. Matula: Fixed-slash and floating-slash rational arithmetic. IEEE Symposium on Computer Arithmetic 1975: 90-91

Robert T. Gregory, David W. Matula: Base conversion in residue number systems. IEEE Symposium on Computer Arithmetic 1975: 117-125

T. R. N. Rao, David W. Matula (Eds.): 3rd IEEE Symposium on Computer Arithmetic, ARITH 1975, Dallas, TX, USA, November 19-20, 1975. IEEE 1975

1972

David W. Matula: Bounded color functions on graphs. Networks 2(1): 29-44 (1972)

John D. Marasa, David W. Matula: A simulative study of correlated error propagation in various finite arithmetics. IEEE Symposium on Computer Arithmetic 1972: 1-44

1971

David W. Matula: Significant Digits: Numerical Analysis or Numerology. IFIP Congress (2) 1971: 1278-1283

1968

David W. Matula: In-and-out conversions. Commun. ACM 11(1): 47-50 (1968)

1967

David W. Matula: Base conversion mappings. AFIPS Spring Joint Computing Conference 1967: 311-318

1	Leland L. Beck	[j6]
2	Jit Biswas	[c13]
3	Gerd Bohlender	[c20]
4	W. S. Briggs	[c22]
5	Hakki C. Cankaya	[c31]
6	Satyendra R. Datla	[c52]
7	Marc Daumas	[j22] [c33] [j15] [c24]
8	Abbas Edalat	[j17]
9	Milos D. Ercegovac	[j18]
10	Guy Even	[j19] [c27]
11	Alex Fit-Florea	[j25] [c48] [c45] [c44] [c42] [c41] [c39] [c38]
12	Robert T. Gregory	[c4]
13	Laurent Imbert	[j18]
14	Cristina Iordache	[j16] [c32]
15	Mihaela Iridon	[j21] [j20] [c31] [c30]
16	Peter Kornerup	[c43] [j14] [c20] [j10] [c17] [j9] [c15] [j7] [c12] [j5] [c11] [c10] [c9] [c7] [c6]
17	Angelika Leskovskaya	[c55]
18	Lun Li	[j25] [c48] [c46] [c42]
19	Chung Nan Lyu	[j19] [c27] [c25]
20	Dhia Mahjoub	[j26] [c56] [c55] [c54] [c51]
21	John D. Marasa	[c3]
22	Lee D. McFearin	[c47] [j24] [j23] [c38] [c37] [c35] [c34]
23	D. Michael Miller	[c49]
24	Jean-Michel Muller	[j18]
25	Asger Munk Nielsen	[j19] [c28] [c27]
26	Mihai T. Panu	[c57]
27	Shrikant N. Parikh	[c19]
28	T. R. N. Rao (Thammavarapu R. N. Rao)	[e1]
29	Debjit Das Sarma	[c29] [c26] [j13] [c23]
30	Peter-Michael Seidel	[j24] [c37]
31	Farhad Shahrokhi	[j12] [j11] [c16]
32	Laura Spenner	[c49]
33	Philipp Sünderhauf	[j17]
34	Mitchell A. Thornton (Mitchell Aaron Thornton)	[j25] [c52] [c49] [c48] [c46] [c44] [c42]
35	Wolfgang Walter	[c20]
36	Guoheng Wei	[j18]
37	Cheng Yang	[j20]

David W. Matula

Coauthor Index