Pinaki Mazumder

Shukai Duan, Xiaofang Hu, Lidan Wang, Chuandong Li, Pinaki Mazumder: Memristor-based RRAM with applications. SCIENCE CHINA Information Sciences 55(6): 1446-1460 (2012)

Pinaki Mazumder, Sung Mo Kang, Rainer Waser: Memristors: Devices, Models, and Applications [Scanning the Issue]. Proceedings of the IEEE 100(6): 1911-1919 (2012)

Idongesit E. Ebong, Pinaki Mazumder: CMOS and Memristor-Based Neural Network Design for Position Detection. Proceedings of the IEEE 100(6): 2050-2060 (2012)

Alfredo Benso, Yiorgos Makris, Pinaki Mazumder: Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. IEEE Trans. Computers 60(4): 450-451 (2011)

Pinaki Mazumder, Sing-Rong Li, Idongesit E. Ebong: Tunneling-Based Cellular Nonlinear Network Architectures for Image Processing. IEEE Trans. VLSI Syst. 17(4): 487-495 (2009)

Baohua Wang, Pinaki Mazumder: An accurate interconnect thermal model using equivalent transmission line circuit. DATE 2009: 280-283

Pinaki Mazumder: Disruptive technologies and neurally-inspired architectures. ACM Great Lakes Symposium on VLSI 2009: 283-284

Baohua Wang, Pinaki Mazumder: Accelerated Chip-Level Thermal Analysis Using Multilayer Green's Function. IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 325-344 (2007)

Qinwei Xu, Pinaki Mazumder: Efficient Modeling of Transmission Lines With Electromagnetic Wave Coupling by Using the Finite Difference Quadrature Method. IEEE Trans. VLSI Syst. 15(12): 1289-1302 (2007)

Woo Hyung Lee, Pinaki Mazumder: Parallel Processing Based Power Reduction in a 256 State Viterbi Decoder. ASAP 2006: 182-185

Baohua Wang, Pinaki Mazumder: Optimization of circuit trajectories: an auxiliary network approach. ASP-DAC 2006: 416-421

Baohua Wang, Pinaki Mazumder: A logarithmic full-chip thermal analysis algorithm based on multi-layer Green's function. DATE 2006: 39-44

Baohua Wang, Pinaki Mazumder: Bounding Supply Noise Induced Path Delay Variation Using a Relaxation Approach. VLSI Design 2006: 349-354

Baohua Wang, Pinaki Mazumder: EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation. DATE 2005: 976-981

Hui Zhang, Pinaki Mazumder: Design of a new sense amplifier flip-flop with improved power-delay-product. ISCAS (2) 2005: 1262-1265

Baohua Wang, Pinaki Mazumder: Integrating lumped networks into full wave TLM/FDTD methods using passive discrete circuit models. ISCAS (3) 2005: 1948-1951

Sing-Rong Li, Pinaki Mazumder, Kyounghoon Yang: On the functional failure and switching time analysis of the MOBILE circuit [monostable-bistable logic element]. ISCAS (3) 2005: 2531-2534

Baohua Wang, Pinaki Mazumder: Multivariate Normal Distribution Based Statistical Timing Analysis Using Global Projection and Local Expansion. VLSI Design 2005: 380-385

Li Ding, Pinaki Mazumder: On circuit techniques to improve noise immunity of CMOS dynamic logic. IEEE Trans. VLSI Syst. 12(9): 910-925 (2004)

Li Ding, Pinaki Mazumder: A novel technique to improve noise immunity of CMOS dynamic logic circuits. DAC 2004: 900-903

Qinwei Xu, Pinaki Mazumder: Modeling of transmission lines with EM wave coupling by the finite difference quadrature method. ACM Great Lakes Symposium on VLSI 2004: 25-28

Sing-Rong Li, Pinaki Mazumder, Leon O. Chua: On the implementation of RTD based CNNs. ISCAS (3) 2004: 25-28

Baohua Wang, Pinaki Mazumder: Fast thermal analysis for VLSI circuits via semi-analytical Green's function in multi-layer materials. ISCAS (2) 2004: 409-412

Hui Zhang, Pinaki Mazumder, Kyounghoon Yang: Resonant tunnelling diode based QMOS edge triggered flip-flop design. ISCAS (3) 2004: 705-708

Baohua Wang, Pinaki Mazumder: On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED 2004: 236-239

Baohua Wang, Pinaki Mazumder: On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED 2004: 332-337

Li Ding, Pinaki Mazumder: Dynamic Noise Margin: Definitions and Model. VLSI Design 2004: 1001-

Li Ding, David T. Blaauw, Pinaki Mazumder: Accurate crosstalk noise modeling for early signal integrity analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 627-634 (2003)

Qinwei Xu, Pinaki Mazumder: Equivalent-circuit interconnect modeling based on the fifth-order differential quadrature methods. IEEE Trans. VLSI Syst. 11(6): 1068-1079 (2003)

Li Ding, Pinaki Mazumder: Simultaneous switching noise analysis using application specific device modeling. IEEE Trans. VLSI Syst. 11(6): 1146-1152 (2003)

Li Ding, Pinaki Mazumder: Modeling Noise Transfer Characteristic of Dynamic Logic Gates. DATE 2003: 11114-11117

Baohua Wang, Pinaki Mazumder: Subgridding method for speeding up FD-TLM circuit simulation. ISCAS (3) 2003: 20-23

Qinwei Xu, Pinaki Mazumder: Efficient interconnect modeling by Finite Difference Quadrature methods. ISCAS (4) 2003: 592-595

Hui Zhang, Pinaki Mazumder, Li Ding, Kyounghoon Yang: Performance modeling of resonant tunneling based RAMs. ISCAS (4) 2003: 900-903

Li Ding, Pinaki Mazumder: The Impact of Bit-Line Coupling and Ground Bounce on CMOS SRAM Performance. VLSI Design 2003: 234-

Alejandro F. González, Pinaki Mazumder: Comparison of Bistable Circuits Based on Resonant-Tunneling Diodes. VLSI Design 2003: 493-492

Li Ding, Pinaki Mazumder: Optimal Transistor Tapering for High-Speed CMOS Circuits. DATE 2002: 708-713

Qinwei Xu, Pinaki Mazumder: Formulation of Low-Order Dominant Poles for Y-Matrix of Interconnects. DATE 2002: 820-825

Li Ding, Pinaki Mazumder: Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling. DATE 2002: 1038-1043

Qinwei Xu, Pinaki Mazumder: Novel interconnect modeling by using high-order compact finite difference methods. ACM Great Lakes Symposium on VLSI 2002: 148-152

Li Ding, David Blaauw, Pinaki Mazumder: Efficient crosstalk noise modeling using aggressor and tree reductions. ICCAD 2002: 595-600

Qinwei Xu, Pinaki Mazumder, Li Ding: Novel macromodeling for on-chip RC/RLC interconnects. ISCAS (4) 2002: 189-192

Li Ding, Pinaki Mazumder: Modified long channel model for analytical study of DSM circuits. ISCAS (5) 2002: 541-544

Li Ding, Pinaki Mazumder, David Blaauw: Crosstalk noise estimation using effective coupling capacitance. ISCAS (5) 2002: 645-648

Tetsuya Uemura, Pinaki Mazumder: Rise time analysis of MOBILE circuit. ISCAS (5) 2002: 864-867

Qinwei Xu, Pinaki Mazumder: Rational ABCD Modeling of High-Speed Interconnects. VLSI Design 2002: 147-

Qinwei Xu, Pinaki Mazumder: Efficient Macromodeling for On-Chip Interconnects. VLSI Design 2002: 561-566

Mayukh Bhattacharya, Pinaki Mazumder: Augmentation of SPICE for simulation of circuits containingresonant tunneling diodes. IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 39-50 (2001)

Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta: A physical design tool for built-in self-repairable RAMs. IEEE Trans. VLSI Syst. 9(2): 352-364 (2001)

Qinwei Xu, Pinaki Mazumder: Efficient and passive modeling of transmission lines by using differential quadrature method. DATE 2001: 437-444

Li Ding, Pinaki Mazumder, N. Srinivas: A dual-rail static edge-triggered latch. ISCAS (2) 2001: 645-648

Qinwei Xu, Pinaki Mazumder, Mayukh Bhattacharya: Modeling of Nonuniform Interconnects by Using Differential Quadrature Method. VLSI Design 2001: 327-332

Qinwei Xu, Pinaki Mazumder, Zheng-Fan Li: Transmission Line Modeling by Modified Method of Characteristics. VLSI Design 2001: 359-364

Mayukh Bhattacharya, Pinaki Mazumder, Ronald J. Lomax: Fd-Tlm Electromagnetic Field Simulation Of High-Speed Iii-V Heterojunction Bipolar Transistor Digital Logic Gates. VLSI Design 2001: 470-474

Kanad Chakraborty, Pinaki Mazumder: New March Tests for Multiport RAM Devices. J. Electronic Testing 16(4): 389-395 (2000)

Alejandro F. González, Pinaki Mazumder: Redundant arithmetic, algorithms and implementations. Integration 30(1): 13-53 (2000)

Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder: Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. ISMVL 2000: 323-

Mayukh Bhattacharya, Pinaki Mazumder: Convergence Issues in Resonant Tunneling Diode Circuit Simulation. VLSI Design 2000: 499-

Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder: A Physical Design Tool for Built-in Self-Repairable Static RAMs. DATE 1999: 714-

Tetsuya Uemura, Pinaki Mazumder: Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit. Great Lakes Symposium on VLSI 1999: 158-161

Patrick Fay, Gary H. Bernstein, David H. Chow, J. Schulman, Pinaki Mazumder, W. Williamson, B. K. Gilbert: Integration of InAs/AlSb/GaSb Resonant Interband Tunneling Diodes with Heterostructure Field-Effect Transistors for Ultra-High-Speed Digital Circuit Applications. Great Lakes Symposium on VLSI 1999: 162-165

Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder: FTROM: A Silicon Compiler for Fault-tolerant ROMs. Integration 26(1-2): 117-140 (1998)

Alejandro F. González, Pinaki Mazumder: Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices. IEEE Trans. Computers 47(9): 947-959 (1998)

Pinaki Mazumder: Guest Editorial Special Section On Impacts Of Emerging Technologies On VLSI Systems. IEEE Trans. VLSI Syst. 6(1): 4-5 (1998)

Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder: A Silicon Compiler for Fault-Tolerant ROMs. DFT 1998: 270-275

Mayukh Bhattacharya, Pinaki Mazumder: Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes. Great Lakes Symposium on VLSI 1998: 65-70

Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González: Circuit Design using Resonant Tunneling Diodes. VLSI Design 1998: 501-506

Pinaki Mazumder: Analysis of Failures in Deep Submicron SRAM Cells. VTS 1998: 184-187

Alejandro F. González, Pinaki Mazumder: Compact Signed-Digit Adder Using Multiple-Valued Logic. ARVLSI 1997: 96-113

Kanad Chakraborty, Pinaki Mazumder: A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs. ED&TC 1997: 330-334

Michael D. Smith, Pinaki Mazumder: Generation of Minimal Vertex Covers for Row/Column Allocation in Self-Repairable Arrays. IEEE Trans. Computers 45(1): 109-115 (1996)

Kanad Chakraborty, Pinaki Mazumder: An efficient, bus-layout based method for early diagnosis of bussed driver shorts in printed circuit boards. ICCAD 1996: 685-688

Shriram Kulkarni, Pinaki Mazumder, George I. Haddad: A high-speed 32-bit parallel correlator for spread spectrum communication. VLSI Design 1996: 313-315

Sundarar Mohan, Jian Ping Sun, Pinaki Mazumder, George I. Haddad: Device and circuit simulation of quantum electronic devices. IEEE Trans. on CAD of Integrated Circuits and Systems 14(6): 653-662 (1995)

Khushro Shahookar, Pinaki Mazumder: Genetic multiway partitioning. VLSI Design 1995: 365-369

Pinaki Mazumder: Guest editor's introduction. J. Electronic Testing 5(4): 319-320 (1994)

Kanad Chakraborty, Pinaki Mazumder: Technology and layout-related testing of static random-access memories. J. Electronic Testing 5(4): 347-365 (1994)

Raja Venkateswaran, Pinaki Mazumder: A survey of DA techniques for PLD and FPGA based systems. Integration 17(3): 191-240 (1994)

Henrik Esbensen, Pinaki Mazumder: A Genetic Algorithm for the Steiner Problem in a Graph. EDAC-ETC-EUROASIC 1994: 402-406

Heming Chan, Pinaki Mazumder: A Systolic Architecture for High Speed Hypergraph Partitioning Using a Genetic Algorithm. Evo Workshops 1994: 109-126

Henrik Esbensen, Pinaki Mazumder: SAGA: A Unification of the Genetic Algorithm with Simulated Annealing and its Application to Macro-Cell Placement. VLSI Design 1994: 211-214

Pinaki Mazumder, John P. Hayes: Guest Editor's Introduction: Testing and Improving the Testability of Multimegabit Memories. IEEE Design & Test of Computers 10(1): 6-7 (1993)

Pinaki Mazumder: Design of a Fault-Tolerant Three-Dimensional Dynamic Random-Access Memory with On-Chip Error-Correcting Circuit. IEEE Trans. Computers 42(12): 1453-1468 (1993)

Pinaki Mazumder, Jih-Shyr Yih: A new built-in self-repair approach to VLSI memory yield enhancement by using neural-type circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 12(1): 124-136 (1993)

Pinaki Mazumder, Jih-Shyr Yih: Restructuring of square processor arrays by built-in self-repair circuit. IEEE Trans. on CAD of Integrated Circuits and Systems 12(9): 1255-1265 (1993)

Sundarar Mohan, Pinaki Mazumder: Wolverines: standard cell placement on a network of workstations. IEEE Trans. on CAD of Integrated Circuits and Systems 12(9): 1312-1326 (1993)

Sundarar Mohan, Pinaki Mazumder: Analytical and simulation studies of failure modes in SRAMs using high electron mobility transistors. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1885-1896 (1993)

Raja Venkateswaran, Pinaki Mazumder: Coprocessor design for multilayer surface-mounted PCB routing. IEEE Trans. VLSI Syst. 1(1): 31-45 (1993)

Khushro Shahookar, W. Khamisani, Pinaki Mazumder, Sudhakar M. Reddy: Genetic Beam Search for Gate Matrix Layout. VLSI Design 1993: 208-213

Pinaki Mazumder, Janak H. Patel: An efficient design of embedded memories and their testability analysis using Markov chains. J. Electronic Testing 3(3): 235-250 (1992)

Raja Venkateswaran, Pinaki Mazumder, K. G. Shin: Restructuring WSI hexagonal processor arrays. IEEE Trans. on CAD of Integrated Circuits and Systems 11(12): 1574-1585 (1992)

Pinaki Mazumder: An Integrated Built-In Self-Testing and Self-Repair of VLSI/WSI Hexagonal Arrays. ITC 1992: 968-977

Khushro Shahookar, Pinaki Mazumder: VLSI Cell Placement Techniques. ACM Comput. Surv. 23(2): 143-220 (1991)

Sundarar Mohan, Pinaki Mazumder: Fault Modeling and Testing of GaAs Static Random Access Memories. ITC 1991: 665-674

Khushro Shahookar, Pinaki Mazumder: A genetic approach to standard cell placement using meta-genetic parameter optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 9(5): 500-511 (1990)

Raja Venkateswaran, Pinaki Mazumder: A hexagonal array machine for multilayer wire routing. IEEE Trans. on CAD of Integrated Circuits and Systems 9(10): 1096-1112 (1990)

Jih-Shyr Yih, Pinaki Mazumder: A neural network design for circuit partitioning. IEEE Trans. on CAD of Integrated Circuits and Systems 9(12): 1265-1271 (1990)

Khushro Shahookar, Pinaki Mazumder: GASP: a Genetic Algorithm for Standard cell Placement. EURO-DAC 1990: 660-664

R. B. Panwar, Pinaki Mazumder: A Parallel Karmarkar Algorithm on Orthogonal Tree Networks. ICPP (3) 1990: 274-277

Pinaki Mazumder, Jih-Shyr Yih: A novel built-in self-repair approach to VLSI memory yield enhancement. ITC 1990: 833-841

Pinaki Mazumder, Janak H. Patel: Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories. IEEE Trans. Computers 38(3): 394-407 (1989)

Jih-Shyr Yih, Pinaki Mazumder: A Neural Network Design for Circuit Partitioning. DAC 1989: 406-411

Pinaki Mazumder, Jih-Shyr Yih: Neural computing for built-in self-repair of embedded memory arrays. FTCS 1989: 480-487

Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs: Methodologies for testing embedded content addressable memories. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 11-20 (1988)

Pinaki Mazumder: An On-Chip Double-Bit Error-Correcting Code for Three-Dimensional Dynamic Random-Access Memory. ITC 1988: 279-288

Pinaki Mazumder: Planar decomposition for quadtree data structure. Computer Vision, Graphics, and Image Processing 38(3): 258-274 (1987)

Pinaki Mazumder: Evaluation of On-Chip Static Interconnection Networks. IEEE Trans. Computers 36(3): 365-369 (1987)

Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs: Design and Algorithms for Parallel Testing of Random Access and Content Addressable Memories. DAC 1987: 689-694

Pinaki Mazumder: Evaluation of Three Interconnection Networks for CMOS VLSI Implementation. ICPP 1986: 200-207