| 2013 | ||
|---|---|---|
| j8 | John McAllister, Luigi Carro, Skevos Evripidou: Guest Editorial: Special Issue on 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI). International Journal of Parallel Programming 41(2): 161-162 (2013) | |
| 2012 | ||
| j7 | Xuezheng Chu, John McAllister: Software-Defined Sphere Decoding for FPGA-Based MIMO Detection. IEEE Transactions on Signal Processing 60(11): 6017-6026 (2012) | |
| c19 | Matthew Milford, John McAllister: Memory-centric VDF graph transformations for practical FPGA implementation. ESTImedia 2012: 12-18 | |
| c18 | Matthew Milford, John McAllister: Valved dataflow for FPGA memory hierarchy synthesis. ICASSP 2012: 1645-1648 | |
| c17 | ||
| c16 | Matthew Milford, John McAllister: Automatic FPGA synthesis of memory intensive C-based kernels. ICSAMOS 2012: 136-143 | |
| 2011 | ||
| j6 | Lei Ma, Kevin Dickson, John McAllister, John V. McCanny: QR Decomposition-Based Matrix Inversion for High Performance Embedded MIMO Receivers. IEEE Transactions on Signal Processing 59(4): 1858-1867 (2011) | |
| j5 | C. Zheng, Xuezheng Chu, John McAllister, Roger Woods: Real-Valued Fixed-Complexity Sphere Decoder for High Dimensional QAM-MIMO Systems. IEEE Transactions on Signal Processing 59(9): 4493-4499 (2011) | |
| c15 | Xuezheng Chu, John McAllister, Roger Woods: A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection. ARC 2011: 133-144 | |
| c14 | Chengwei Zheng, John McAllister, Yun Wu: A kernel interleaved scheduling method for streaming applications on soft-core vector processors. ICSAMOS 2011: 278-285 | |
| e1 | Andreas Koch, Ram Krishnamurthy, John McAllister, Roger Woods, Tarek A. El-Ghazawi (Eds.): Reconfigurable Computing: Architectures, Tools and Applications - 7th International Symposium, ARC 2011, Belfast, UK, March 23-25, 2011. Proceedings. Lecture Notes in Computer Science 6578, Springer 2011, isbn 978-3-642-19474-0 | |
| 2010 | ||
| j4 | Scott Fischaber, Roger Woods, John McAllister: SoC Memory Hierarchy Derivation from Dataflow Graphs. Signal Processing Systems 60(3): 345-361 (2010) | |
| c13 | Xuezheng Chu, John McAllister: FPGA based soft-core SIMD processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder case study. FPT 2010: 479-484 | |
| 2008 | ||
| c12 | Stephen McKeown, Roger Woods, John McAllister: Power efficient DSP datapath configuration methodology for FPGA. FPL 2008: 515-518 | |
| c11 | Lei Ma, Kevin Dickson, John McAllister, John V. McCanny: Modified givens rotations and their application to matrix inversion. ICASSP 2008: 1437-1440 | |
| c10 | ||
| c9 | Scott Fischaber, John McAllister, Roger Woods: Memory-Centric Hardware Synthesis from Dataflow Models. SAMOS 2008: 197-206 | |
| c8 | Lei Ma, Kevin Dickson, John McAllister, John V. McCanny, Mathini Sellathurai: Reduced-complexity MSGR-based matrix inversion. SiPS 2008: 124-128 | |
| c7 | Stephen McKeown, Roger Woods, John McAllister: Power efficient dynamic-range utilisation for DSP on FPGA. SiPS 2008: 233-238 | |
| 2007 | ||
| j3 | John McAllister, Roger Woods, Scott Fischaber, E. Malins: Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms. Journal of Systems Architecture 53(8): 511-523 (2007) | |
| j2 | Erdem Motuk, Roger Woods, Stefan Bilbao, John McAllister: Design Methodology for Real-Time FPGA-Based Sound Synthesis. IEEE Transactions on Signal Processing 55(12): 5833-5845 (2007) | |
| c6 | Scott Fischaber, Roger Woods, John McAllister: SOC Memory Hierarchy Derivation from Dataflow Graphs. SiPS 2007: 469-474 | |
| 2006 | ||
| j1 | John McAllister, Roger Woods, Richard L. Walke, D. Reilly: Multidimensional DSP Core Synthesis for FPGA. VLSI Signal Processing 43(2-3): 207-221 (2006) | |
| c5 | Scott Fischaber, John McAllister, Roger Woods, E. Malins: Muir Hardware Synthesis for Multimedia Applications. ESTImedia 2006: 101-106 | |
| 2005 | ||
| c4 | Jasmine Lam, John McAllister, Jennifer Dudley: Core-Based Methodology: An Automated Approach for Implementing a Complete System from Algorithms to a Heterogeneous Network including FPGAs. FCCM 2005: 325-326 | |
| c3 | Scott Fischaber, R. Hasson, John McAllister, Roger Woods: FPGA Core Network Implementation and Optimization: A Case Study. FPT 2005: 319-320 | |
| c2 | John McAllister, Roger Woods, D. Reilly, Scott Fischaber, R. Hasson: Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms. SAMOS 2005: 414-423 | |
| 2004 | ||
| c1 | John McAllister, Roger Woods, Richard L. Walke: Embedded Context Aware Hardware Component Generation for Dataflow System Exploration. SAMOS 2004: 254-263 | |
Colors in the list of coauthors
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