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 | 2012 | |
|---|---|---|
| j2 |      | Qingyuan Deng, Luiz E. Ramos, Ricardo Bianchini, David Meisner, Thomas F. Wenisch: Active Low-Power Modes for Main Memory with MemScale. IEEE Micro 32(3): 60-69 (2012) |
| c12 | | David Meisner, Thomas F. Wenisch: DreamWeaver: architectural support for deep sleep. ASPLOS 2012: 313-324 |
| c11 | | Qingyuan Deng, David Meisner, Abhishek Bhattacharjee, Thomas F. Wenisch, Ricardo Bianchini: MultiScale: memory system DVFS with multiple memory controllers. ISLPED 2012: 297-302 |
| c10 | | David Meisner, Junjie Wu, Thomas F. Wenisch: BigHouse: A simulation infrastructure for data center systems. ISPASS 2012: 35-45 |
| c9 | | Qingyuan Deng, David Meisner, Abhishek Bhattacharjee, Thomas F. Wenisch, Ricardo Bianchini: CoScale: Coordinating CPU and Memory System DVFS in Server Systems. MICRO 2012: 143-154 |
| 2011 | ||
| j1 | | David Meisner, Brian T. Gold, Thomas F. Wenisch: The PowerNap Server Architecture. ACM Trans. Comput. Syst. 29(1): 3 (2011) |
| c8 | | Qingyuan Deng, David Meisner, Luiz E. Ramos, Thomas F. Wenisch, Ricardo Bianchini: MemScale: active low-power modes for main memory. ASPLOS 2011: 225-238 |
| c7 | | David Meisner, Christopher M. Sadler, Luiz André Barroso, Wolf-Dietrich Weber, Thomas F. Wenisch: Power management of online data-intensive services. ISCA 2011: 319-330 |
| c6 | | David Meisner, Thomas F. Wenisch: Does low-power design imply energy efficiency for data centers? ISLPED 2011: 109-114 |
| c5 | | David Meisner, Junjie Wu, Thomas F. Wenisch: Towards a scalable data center-level evaluation methodology. ISPASS 2011: 121-122 |
| 2010 | ||
| c4 | | Steven Pelley, David Meisner, Pooya Zandevakili, Thomas F. Wenisch, Jack Underwood: Power routing: dynamic power provisioning in the data center. ASPLOS 2010: 231-242 |
| c3 | | David Meisner, Thomas F. Wenisch: Peak power modeling for data center servers with switched-mode power supplies. ISLPED 2010: 319-324 |
| 2009 | ||
| c2 | | David Meisner, Brian T. Gold, Thomas F. Wenisch: PowerNap: eliminating server idle power. ASPLOS 2009: 205-216 |
| 2007 | ||
| c1 | | David Meisner, Sherief Reda: Hardware libraries: An architecture for economic acceleration in soft multi-core environments. ICCD 2007: 179-186 |
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