| 2011 | ||
|---|---|---|
| p2 | Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld: Hardware Support for Efficient Resource Utilization in Manycore Processor Systems. Multiprocessor System-on-Chip 2011: 57-87 | |
| 2010 | ||
| p1 | Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: FlexPath NP - Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. Dynamically Reconfigurable Systems 2010: 355-374 | |
| c7 | Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: An Application-Aware Load Balancing Strategy for Network Processors. HiPEAC 2010: 156-170 | |
| 2009 | ||
| c6 | Shadi Traboulsi, Michael Meitinger, Rainer Ohlendorf, Andreas Herkersdorf: An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs. DSD 2009: 11-18 | |
| 2008 | ||
| j2 | Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Trans. VLSI Syst. 16(10): 1335-1345 (2008) | |
| c5 | Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Hardware Packet Re-Sequencer Unit for Network Processors. ARCS 2008: 85-97 | |
| c4 | Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: Network processors. FPL 2008: 352 | |
| 2007 | ||
| j1 | Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications. Journal of Systems Architecture 53(10): 703-718 (2007) | |
| c3 | Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. ISVLSI 2007: 259-264 | |
| 2006 | ||
| c2 | Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild: Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dynamically Reconfigurable Architectures 2006 | |
| c1 | Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. ICSAMOS 2006: 152-159 | |
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