| 2012 | ||
|---|---|---|
| c2 | Kelvin Nelson, Jaga Shanmugavadivelu, Jayanth Mekkoth, Venkat Ghanta, Jun Wu, Fei Zhuang, Hao-Jan Chao, Shianling Wu, Jie Rao, Lizhen Yu, Laung-Terng Wang: Physical-design-friendly hierarchical logic built-in self-test - A case study. ISQED 2012: 1-6 | |
| 2009 | ||
| c1 | Jun Qian, Xingang Wang, Qinfu Yang, Fei Zhuang, Junbo Jia, Xiangfeng Li, Yuan Zuo, Jayanth Mekkoth, Jinsong Liu, Hao-Jan Chao, Shianling Wu, Huafeng Yang, Lizhen Yu, FeiFei Zhao, Laung-Terng Wang: Logic BIST Architecture for System-Level Test and Diagnosis. Asian Test Symposium 2009: 21-26 | |
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