| 2013 | ||
|---|---|---|
| j20 | Michael J. Flynn, Oskar Mencer, Veljko M. Milutinovic, Goran Rakocevic, Per Stenström, Roman Trobec, Mateo Valero: Moving from petaflops to petadata. Commun. ACM 56(5): 39-42 (2013) | |
| j19 | Oliver Pell, Jacob A. Bower, Robert G. Dimond, Oskar Mencer, Michael J. Flynn: Finite-Difference Wave Propagation Modeling on Special-Purpose Dataflow Machines. IEEE Trans. Parallel Distrib. Syst. 24(5): 906-915 (2013) | |
| 2012 | ||
| j18 | Stephen Weston, James Spooner, Sébastien Racanière, Oskar Mencer: Rapid computation of value and risk for derivatives portfolios. Concurrency and Computation: Practice and Experience 24(8): 880-894 (2012) | |
| j17 | Kubilay Atasu, Wayne Luk, Oskar Mencer, Can C. Özturan, Günhan Dündar: FISH: Fast Instruction SyntHesis for Custom Processors. IEEE Trans. VLSI Syst. 20(1): 52-65 (2012) | |
| c43 | ||
| c42 | ||
| 2011 | ||
| j16 | Olav Lindtjorn, Robert G. Clapp, Oliver Pell, Haohuan Fu, Michael J. Flynn, Oskar Mencer: Beyond Traditional Microprocessors for Geoscience High-Performance Computing Applications. IEEE Micro 31(2): 41-49 (2011) | |
| j15 | Oliver Pell, Oskar Mencer: Surviving the end of frequency scaling with reconfigurable dataflow computing. SIGARCH Computer Architecture News 39(4): 60-65 (2011) | |
| j14 | William G. Osborne, Wayne Luk, José Gabriel F. Coutinho, Oskar Mencer: Energy Reduction by Systematic Run-Time Reconfigurable Hardware Deactivation. T. HiPEAC 4: 354-369 (2011) | |
| 2010 | ||
| j13 | Haohuan Fu, Oskar Mencer, Wayne Luk: FPGA Designs with Optimized Logarithmic Arithmetic. IEEE Trans. Computers 59(7): 1000-1006 (2010) | |
| c41 | Masato Yoshimi, Yuri Nishikawa, Mitsunori Miki, Tomoyuki Hiroyasu, Hideharu Amano, Oskar Mencer: A Performance Evaluation of CUBE: One-Dimensional 512 FPGA Cluster. ARC 2010: 372-381 | |
| 2009 | ||
| j12 | Haohuan Fu, William G. Osborne, Robert G. Clapp, Oskar Mencer, Wayne Luk: Accelerating Seismic Computations Using Customized Number Representations on FPGAs. EURASIP J. Emb. Sys. 2009 (2009) | |
| c40 | ||
| 2008 | ||
| j11 | Kubilay Atasu, Can C. Özturan, Günhan Dündar, Oskar Mencer, Wayne Luk: CHIPS: Custom Hardware Instruction Processor Synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 528-541 (2008) | |
| j10 | Wayne Luk, Yvon Savaria, Oskar Mencer: Guest Editorial: 20 Years of ASAP. Signal Processing Systems 53(1-2): 1-2 (2008) | |
| c39 | Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. Özturan, Günhan Dündar: Fast custom instruction identification by convex subgraph enumeration. ASAP 2008: 1-6 | |
| c38 | Jeehong Yang, Serap A. Savari, Oskar Mencer: An Approach to Graph and Netlist Compression. DCC 2008: 33-42 | |
| c37 | William G. Osborne, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer: Power-Aware and Branch-Aware Word-Length Optimization. FCCM 2008: 129-138 | |
| c36 | ||
| c35 | Michael J. Flynn, Robert G. Dimond, Oskar Mencer, Oliver Pell: Finding Speedup in Parallel Processors. ISPDC 2008: 3-7 | |
| c34 | Tim Todman, Haohuan Fu, Brittle Tsoi, Oskar Mencer, Wayne Luk: Smart Enumeration: A Systematic Approach to Exhaustive Search. PATMOS 2008: 429-438 | |
| c33 | William G. Osborne, Wayne Luk, José Gabriel F. Coutinho, Oskar Mencer: Reconfigurable design with clock gating. ICSAMOS 2008: 187-194 | |
| 2007 | ||
| j9 | José Gabriel F. Coutinho, M. P. T. Juvonen, J. L. Wang, B. L. Lo, Wayne Luk, Oskar Mencer, G. Z. Yang: Designing a Posture Analysis System with Hardware Implementation. VLSI Signal Processing 47(1): 33-45 (2007) | |
| c32 | Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Wayne Luk, Can C. Özturan, Günhan Dündar: Optimizing instruction-set extensible processors under data bandwidth constraints. DATE 2007: 588-593 | |
| c31 | ||
| c30 | William G. Osborne, Ray C. C. Cheung, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer: Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems. FPL 2007: 617-620 | |
| c29 | William G. Osborne, José Gabriel F. Coutinho, Ray C. C. Cheung, Wayne Luk, Oskar Mencer: Instrumented Multi-Stage Word-Length Optimization. FPT 2007: 89-96 | |
| c28 | Tim Todman, Haofan Fu, Oskar Mencer, Wayne Luk: Improving Bounds for FPGA Logic Minimization. FPT 2007: 245-248 | |
| 2006 | ||
| j8 | Jacob A. Bower, Wayne Luk, Oskar Mencer, Michael J. Flynn, Martin Morf: Dynamic clock-frequencies for FPGAs. Microprocessors and Microsystems 30(6): 388-397 (2006) | |
| j7 | Oskar Mencer: ASC: a stream compiler for computing with FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1603-1617 (2006) | |
| j6 | Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides: Accuracy-Guaranteed Bit-Width Optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1990-2000 (2006) | |
| c27 | Robert G. Dimond, Oskar Mencer, Wayne Luk: Automating processor customisation: optimised memory access and resource sharing. DATE 2006: 206-211 | |
| c26 | Robert G. Dimond, Oskar Mencer, Wayne Luk: Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA. FCCM 2006: 175-184 | |
| c25 | Evgeny Fiksman, Yitzhak Birk, Oskar Mencer: ASC-Based Acceleration in an FPGA with a Processor Core Using Software-Only Skills. FCCM 2006: 271-272 | |
| c24 | Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckmann: FPGAs, GPUs and the PS2 - A Single Programming Methodology. FCCM 2006: 313-314 | |
| c23 | Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckmann, Oliver Pell: Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description. FPL 2006: 1-6 | |
| c22 | Haohuan Fu, Oskar Mencer, Wayne Luk: Comparing floating-point and logarithmic number representations for reconfigurable acceleration. FPT 2006: 337-340 | |
| c21 | Jacob A. Bower, David B. Thomas, Wayne Luk, Oskar Mencer: A Reconfigurable Simulation Framework for Financial Computation. ReConFig 2006: 30-38 | |
| 2005 | ||
| j5 | Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk: Optimizing Hardware Function Evaluation. IEEE Trans. Computers 54(12): 1520-1531 (2005) | |
| c20 | Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung: Automating custom-precision function evaluation for embedded processors. CASES 2005: 22-31 | |
| c19 | Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk: MiniBit: bit-width optimization via affine arithmetic. DAC 2005: 837-840 | |
| c18 | Robert G. Dimond, Oskar Mencer, Wayne Luk: CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools. FPL 2005: 1-6 | |
| c17 | M. P. T. Juvonen, José Gabriel F. Coutinho, J. L. Wang, B. L. Lo, Wayne Luk, Oskar Mencer, G. Z. Yang: Custom Hardware Architectures for Posture Analysis. FPT 2005: 77-84 | |
| 2004 | ||
| j4 | Oskar Mencer, Wayne Luk: Parameterized High Throughput Function Evaluation for FPGAs. VLSI Signal Processing 36(1): 17-25 (2004) | |
| c16 | Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung: Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs. FCCM 2004: 79-88 | |
| c15 | Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk: Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs. FPL 2004: 364-373 | |
| c14 | Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk: Adaptive range reduction for hardware function evaluation. FPT 2004: 169-176 | |
| 2003 | ||
| c13 | Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai: PyHDL: Hardware Scripting with Python. Engineering of Reconfigurable Systems and Algorithms 2003: 288-291 | |
| c12 | Jian Liang, Russell Tessier, Oskar Mencer: Floating Point Unit Generation and Evaluation for FPGAs. FCCM 2003: 185-194 | |
| c11 | Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai: Hardware Design with a Scripting Language. FPL 2003: 1040-1043 | |
| c10 | Oskar Mencer, David J. Pearce, Lee W. Howes, Wayne Luk: Design space exploration with A Stream Compiler. FPT 2003: 270-277 | |
| 2002 | ||
| c9 | Oskar Mencer: PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs. FCCM 2002: 67-76 | |
| c8 | Oskar Mencer, Zhining Huang, Lorenz Huelsbergen: HAGAR: Efficient Multi-context Graph Processors. FPL 2002: 915-924 | |
| c7 | Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi: Floating-point bitwidth analysis via automatic differentiation. FPT 2002: 158-165 | |
| 2001 | ||
| j3 | Oskar Mencer, Marco Platzner, Martin Morf, Michael J. Flynn: Object-oriented domain specific compilers for programming FPGAs. IEEE Trans. VLSI Syst. 9(1): 205-210 (2001) | |
| c6 | Nicolas Boullis, Oskar Mencer, Wayne Luk, Henry Styles: Pipelined Function Evaluation on FPGAs. FCCM 2001: 304-306 | |
| c5 | Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles: Parameterized Function Evaluation for FPGAs. FPL 2001: 544-554 | |
| 2000 | ||
| j2 | Oskar Mencer, Luc Séméria, Martin Morf, Jean-Marc Delosme: Application of Reconfigurable CORDIC Architectures. VLSI Signal Processing 24(2-3): 211-221 (2000) | |
| c4 | Oskar Mencer, Heiko Hübert, Martin Morf, Michael J. Flynn: StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox. FCCM 2000: 309-312 | |
| c3 | Oskar Mencer, Heiko Hübert, Martin Morf, Michael J. Flynn: StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox. FPL 2000: 595-604 | |
| 1999 | ||
| c2 | Oskar Mencer, Marco Platzner: Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment. HICSS 1999 | |
| 1998 | ||
| c1 | Oskar Mencer, Martin Morf, Michael J. Flynn: PAM-Blox: High Performance FPGA Design for Adaptive Computing. FCCM 1998: 167-174 | |
| 1997 | ||
| j1 | William H. Mangione-Smith, Brad Hutchins, David L. Andrews, André DeHon, Carl Ebeling, Reiner W. Hartenstein, Oskar Mencer, John Morris, Krishna V. Palem, Viktor K. Prasanna, Henk A. E. Spaanenburg: Seeking Solutions in Configurable Computing. IEEE Computer 30(12): 38-43 (1997) | |
Colors in the list of coauthors
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