Avi Mendelson

Roman Malits, Evgeny Bolotin, Avinoam Kolodny, Avi Mendelson: Exploring the limits of GPGPU scheduling in control flow bound applications. TACO 8(4): 29 (2012)

Alex Veidenbaum, Nectarios Koziris, Toshinori Sato, Avi Mendelson: Topic 4: High-Performance Architecture and Compilers. Euro-Par 2012: 204-205

Uri Verner, Assaf Schuster, Mark Silberstein, Avi Mendelson: Scheduling processing of real-time data streams on heterogeneous multi-GPU systems. SYSTOR 2012: 7

Carlos Villavieja, Vasileios Karakostas, Lluís Vilanova, Yoav Etsion, Alex Ramírez, Avi Mendelson, Nacho Navarro, Adrián Cristal, Osman S. Unsal: DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory. PACT 2011: 340-349

Avi Timor, Avi Mendelson, Yitzhak Birk, Neeraj Suri: Using Underutilized CPU Resources to Enhance Its Reliability. IEEE Trans. Dependable Sec. Comput. 7(1): 94-109 (2010)

Zvika Guz, Oved Itzhak, Idit Keidar, Avinoam Kolodny, Avi Mendelson, Uri C. Weiser: Threads vs. caches: Modeling the behavior of parallel workloads. ICCD 2010: 274-281

Taisuke Boku, Hiroshi Nakashima, Avi Mendelson (Eds.): Proceedings of the 24th International Conference on Supercomputing, 2010, Tsukuba, Ibaraki, Japan, June 2-4, 2010. ACM 2010, isbn 978-1-4503-0018-6

Zvika Guz, Evgeny Bolotin, Idit Keidar, Avinoam Kolodny, Avi Mendelson, Uri C. Weiser: Many-Core vs. Many-Thread Machines: Stay Away From the Valley. Computer Architecture Letters 8(1): 25-28 (2009)

Ron Gabor, Avi Mendelson, Shlomo Weiss: Service level agreement for multithreaded processors. TACO 6(2) (2009)

Efraim Rotem, Avi Mendelson, Ran Ginosar, Uri C. Weiser: Multiple clock and voltage domains for chip multi processors. MICRO 2009: 459-468

Bratin Saha, Xiaocheng Zhou, Hu Chen, Ying Gao, Shoumeng Yan, Mohan Rajagopalan, Jesse Fang, Peinan Zhang, Ronny Ronen, Avi Mendelson: Programming model for a heterogeneous x86 platform. PLDI 2009: 431-440

Neeraj Suri, Christof Fetzer, Jacob Abraham, Stefan Poledna, Avi Mendelson, Subhasish Mitra: Dependable Embedded Systems Special Day Panel: Issues and Challenges in Dependable Embedded Systems. DATE 2008: 1394-1395

Ron Gabor, Shlomo Weiss, Avi Mendelson: Fairness enforcement in switch on event multithreading. TACO 4(3) (2007)

Michael Behar, Avi Mendelson, Avinoam Kolodny: Trace cache sampling filter. ACM Trans. Comput. Syst. 25(1) (2007)

Alex Gontmakher, Avi Mendelson, Assaf Schuster, Gregory Shklover: Code Compilation for an Explicitly Parallel Register-Sharing Architecture. ICPP 2007: 58

Avi Mendelson: Current trends in computer architectures: multi-cores, many-cores and special-cores. ICS 2007: 1

Alex Gontmakher, Avi Mendelson, Assaf Schuster: Using fine grain multithreading for energy efficient computing. PPOPP 2007: 259-269

Alexander Gendler, Avi Mendelson, Yitzhak Birk: A PAB-Based Multi-Prefetcher Mechanism. International Journal of Parallel Programming 34(2): 171-188 (2006)

Alex Gontmakher, Assaf Schuster, Avi Mendelson: Inthreads: a low granularity parallelization model. SIGARCH Computer Architecture News 34(1): 77-80 (2006)

Alex Gontmakher, Avi Mendelson, Assaf Schuster, Gregory Shklover: Speculative synchronization and thread management for fine granularity threads. HPCA 2006: 278-287

Avi Mendelson: Memory management challenges in the power-aware computing era. ISMM 2006: 1-2

Ron Gabor, Shlomo Weiss, Avi Mendelson: Fairness and Throughput in Switch on Event Multithreading. MICRO 2006: 149-160

Michael Behar, Avi Mendelson, Avinoam Kolodny: Trace Cache Sampling Filter. IEEE PACT 2005: 255-266

Roni Rosner, Yoav Almog, Micha Moffie, Naftali Schwartz, Avi Mendelson: Power Awareness through Selective Dynamically Optimized Traces. ISCA 2004: 162-175

Aviad Cohen, Lev Finkelstein, Avi Mendelson, Ronny Ronen, Dmitry Rudoy: On Estimating Optimal Performance of CPU Dynamic Thermal Management. Computer Architecture Letters 2 (2003)

Baruch Solomon, Avi Mendelson, Ronny Ronen, Doron Orenstein, Yoav Almog: Micro-operation cache: a power aware frontend for variable instruction length ISA. IEEE Trans. VLSI Syst. 11(5): 801-811 (2003)

Roni Rosner, Yoav Almog, Micha Moffie, Naftali Schwartz, Avi Mendelson: PARROT: Power Awareness Through Selective Dynamically Optimized Traces. PACS 2003: 196-214

Neeraj Suri, Avi Mendelson: Design of a parallel interconnect based on communication pattern considerations. Parallel Algorithms Appl. 16(4): 243-271 (2001)

Avi Mendelson, Freddy Gabbay: The effect of seance communication on multiprocessing systems. ACM Trans. Comput. Syst. 19(2): 252-281 (2001)

Roni Rosner, Avi Mendelson, Ronny Ronen: Filtering Techniques to Improve Trace-Cache Efficiency. IEEE PACT 2001: 37-48

Baruch Solomon, Avi Mendelson, Doron Orenstein, Yoav Almog, Ronny Ronen: Micro-operation cache: a power aware frontend for the variable instruction length ISA. ISLPED 2001: 4-9

Avi Mendelson, Neeraj Suri: Designing High-Performance & Reliable Superscalar Architectures: The out of Order Reliable Superscalar (O3RS) Approach. DSN 2000: 473-481

Avi Mendelson, Michael Bekerman: Design Alternatives of Multithreaded Architecture. International Journal of Parallel Programming 27(3): 161-193 (1999)

Freddy Gabbay, Avi Mendelson: The "Smart" simulation environment - A tool-set to develop new cache coherency protocols. Journal of Systems Architecture 45(8): 619-632 (1999)

Freddy Gabbay, Avi Mendelson: Using Value Prediction to Increase the Power of Speculative Execution Hardware. ACM Trans. Comput. Syst. 16(3): 234-270 (1998)

Freddy Gabbay, Avi Mendelson: The Effect of Instruction Fetch Bandwidth on Value Prediction. ISCA 1998: 272-281

Avi Mendelson, Neeraj Suri: Cache based fault recovery for distributed systems. ICECCS 1997: 119-129

Freddy Gabbay, Avi Mendelson: Smart: An Advanced Shared-Memory Simulator - Towards a System-Level Simulation Environmen. MASCOTS 1997: 131-

Freddy Gabbay, Avi Mendelson: Can Program Profiling Support Value Prediction? MICRO 1997: 270-280

Michael Bekerman, Avi Mendelson, Gad Sheaffer: Performance and hardware complexity tradeoffs in designing multithreaded architectures. IEEE PACT 1996: 24-34

Avi Mendelson, Bilha Mendelson: Toward a General-Purpose Multi-Stream System. IFIP PACT 1994: 335-338

Neeraj Suri, Avi Mendelson, Dhiraj K. Pradhan: BDG-torus union graph-an efficient algorithmically specializedparallel interconnect. SPDP 1991: 407-414