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Bart Mesman
2010 – today
- 2012
[c38]Dongrui She, Yifan He, Bart Mesman, Henk Corporaal: Scheduling for register file energy minimization in explicit datapath architectures. DATE 2012: 388-393- [c37]Gert-Jan van den Braak, Cedric Nugteren, Bart Mesman, Henk Corporaal: GPU-Vote: A Framework for Accelerating Voting Algorithms on GPU. Euro-Par 2012: 945-956
- 2011
- [c36]Maurice Peemen, Bart Mesman, Henk Corporaal: Efficiency Optimization of Trainable Feature Extractors for a Consumer Platform. ACIVS 2011: 293-304
- [c35]Gert-Jan van den Braak, Cedric Nugteren, Bart Mesman, Henk Corporaal: Fast Hough Transform on GPUs: Exploration of Algorithm Trade-Offs. ACIVS 2011: 611-622
- [c34]Yifan He, Zhenyu Ye, Dongrui She, Bart Mesman, Henk Corporaal: Feasibility Analysis of Ultra High Frame Rate Visual Servoing on FPGA and SIMD Processor. ACIVS 2011: 623-634
- [c33]Cedric Nugteren, Gert-Jan van den Braak, Henk Corporaal, Bart Mesman: High performance predictable histogramming on GPUs: exploring and evaluating algorithm trade-offs. GPGPU 2011: 1
- [c32]Ahsan Shabbir, Sander Stuijk, Akash Kumar, Henk Corporaal, Bart Mesman: An MPSoC design approach for multiple use-cases of throughput constrainted applications. Conf. Computing Frontiers 2011: 20
- [c31]Zhenyu Ye, Yifan He, Roel Pieters, Bart Mesman, Henk Corporaal, Pieter Jonker: Demo: An embedded vision system for high frame rate visual servoing. ICDSC 2011: 1-2
- [c30]Zhenyu Ye, Yifan He, Roel Pieters, Bart Mesman, Henk Corporaal, Pieter Jonker: Bottlenecks and Tradeoffs in High Frame Rate Visual Servoing: A Case Study. MVA 2011: 55-58
- [c29]Cedric Nugteren, Henk Corporaal, Bart Mesman: Skeleton-based automatic parallelization of image processing algorithms for GPUs. ICSAMOS 2011: 25-32
- [c28]Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal: Distributed resource management for concurrent execution of multimedia applications on MPSoC platforms. ICSAMOS 2011: 132-139
- [c27]Yifan He, Dongrui She, Bart Mesman, Henk Corporaal: MOVE-Pro: A low power and high code density TTA architecture. ICSAMOS 2011: 294-301
- 2010
- [j9]Ahsan Shabbir, Akash Kumar, Sander Stuijk, Bart Mesman, Henk Corporaal: CA-MPSoC: An automated design flow for predictable multi-processor architectures for multiple applications. Journal of Systems Architecture - Embedded Systems Design 56(7): 265-277 (2010)
- [j8]Akash Kumar, Bart Mesman, Henk Corporaal, Yajun Ha: Iterative Probabilistic Performance Prediction for Multi-Application Multiprocessor Systems. IEEE Trans. on CAD of Integrated Circuits and Systems 29(4): 538-551 (2010)
- [c26]Ahsan Shabbir, Sander Stuijk, Akash Kumar, Bart D. Theelen, Bart Mesman, Henk Corporaal: A predictable communication assist. Conf. Computing Frontiers 2010: 97-98
- [c25]Tim Drijvers, Carlos A. Alba Pinto, Henk Corporaal, Bart Mesman, Gert-Jan van den Braak: Fast Huffman decoding by exploiting data level parallelism. ICSAMOS 2010: 86-92
- [c24]Gert-Jan van den Braak, Bart Mesman, Henk Corporaal: Compile-time GPU memory access optimizations. ICSAMOS 2010: 200-207
2000 – 2009
- 2009
- [c23]Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal: Performance evaluation of concurrently executing parallel applications on multi-processor systems. ICSAMOS 2009: 100-107
- 2008
- [j7]Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Corporaal, Yajun Ha: Analyzing composability of applications on MPSoC platforms. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 369-383 (2008)
- [j6]Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesman, Henk Corporaal: Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA. ACM Trans. Design Autom. Electr. Syst. 13(3) (2008)
- [c22]Yifan He, Zoran Zivkovic, Richard P. Kleihorst, Alexander Danilin, Henk Corporaal, Bart Mesman: Real-Time Hough Transform on 1-D SIMD Processors: Implementation and Architecture Exploration. ACIVS 2008: 254-265
- [c21]Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal: Enabling MPSoC Design Space Exploration on FPGAs. IMTIC 2008: 412-421
- [c20]Raymond Frijns, Hamed Fatemi, Bart Mesman, Henk Corporaal: DC-SIMD : Dynamic communication for SIMD processors. IPDPS 2008: 1-10
- 2007
- [c19]Akash Kumar, Bart Mesman, Henk Corporaal, Bart D. Theelen, Yajun Ha: A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices. DAC 2007: 726-731
- [c18]Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesman, Henk Corporaal: Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA. FPL 2007: 92-97
- 2006
- [j5]Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Basten, Richard P. Kleihorst: RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications. J. Embedded Computing 2(2): 167-179 (2006)
- [c17]Bart Mesman, Hamed Fatemi, Henk Corporaal, Twan Basten: Dynamic-SIMD for lens distortion compensation. ASAP 2006: 261-264
- [c16]Akash Kumar, Bart Mesman, Henk Corporaal, Jef L. van Meerbergen, Yajun Ha: Global Analysis of Resource Arbitration for MPSoC. DSD 2006: 71-78
- [c15]Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Corporaal, Yajun Ha: Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip. ESTImedia 2006: 33-38
- [c14]Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Basten, Pieter P. Jonker: Run-time reconfiguration of communication in SIMD architectures. IPDPS 2006
- 2005
- [c13]Sander Stuijk, Twan Basten, Bart Mesman, Marc Geilen: Predictable Embedding of Large Data Structures in Multiprocessor Networks-on-Chip. DATE 2005: 254-255
- [c12]Sander Stuijk, Twan Basten, Bart Mesman, Marc Geilen: Predictable embedding of large data structures in multiprocessor networks-on-chip. DSD 2005: 388-396
- 2004
- [c11]Marco Bekooij, Orlando Moreira, Peter Poplavko, Bart Mesman, Milan Pastrnak, Jef L. van Meerbergen: Predictable Embedded Multiprocessor System Design. SCOPES 2004: 77-91
- 2003
- [j4]Bart Mesman, Qin Zhao, Natalino G. Busá, Katarzyna Leijten-Nowak: Reconfigurable Instruction-Set Application-Tuning for DSP. Journal of Circuits, Systems, and Computers 12(3): 333-352 (2003)
- [j3]Qin Zhao, Bart Mesman, Twan Basten: Static resource models for code-size efficient embedded processors. ACM Trans. Embedded Comput. Syst. 2(2): 219-250 (2003)
- [c10]Peter Poplavko, Twan Basten, Marco Bekooij, Jef L. van Meerbergen, Bart Mesman: Task-level timing models for guaranteed performance in multiprocessor networks-on-chip. CASES 2003: 63-72
- [c9]Qin Zhao, Bart Mesman, Henk Corporaal: Limited Address Range Architecture for Reducing Code Size in Embedded Processors. SCOPES 2003: 2-16
- 2002
- [c8]Qin Zhao, Bart Mesman, Twan Basten: Practical Instruction Set Design and Compiler Retargetability Using Static Resource Models. DATE 2002: 1021-1026
- 2001
- [c7]Carlos A. Alba Pinto, Bart Mesman, Koen Van Eijk, Jochen A. G. Jess: Constraint satisfaction for storage files with Fifos or stacks during scheduling. DATE 2001: 824
- [c6]Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Jess: Constraint Satisfaction for Relative Location Assignment and Scheduling. ICCAD 2001: 384-390
- [c5]Qin Zhao, Twan Basten, Bart Mesman, C. A. J. van Eijk, Jochen A. G. Jess: Static resource models of instruction sets. ISSS 2001: 159-164
- 2000
- [j2]Koen Van Eijk, Bart Mesman, Carlos A. Alba Pinto, Qin Zhao, Marco Bekooij, Jef L. van Meerbergen, Jochen A. G. Jess: Constraint analysis for code generation: basic techniques and applications in FACTS. ACM Trans. Design Autom. Electr. Syst. 5(4): 774-793 (2000)
1990 – 1999
- 1999
- [j1]Bart Mesman, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess: Constraint analysis for DSP code generation. IEEE Trans. on CAD of Integrated Circuits and Systems 18(1): 44-57 (1999)
- [c4]C. A. J. van Eijk, E. T. A. F. Jacobs, Bart Mesman, Adwin H. Timmer: Identification and Exploitation of Symmetries in DSP Algorithms. DATE 1999: 602-608
- [c3]Bart Mesman, Carlos A. Alba Pinto, Koen Van Eijk: Efficient Scheduling of DSP Code on Processors with Distributed Register Files. ISSS 1999: 100-106
- 1998
- [c2]Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess: A Constraint Driven Approach to Loop Pipelining and Register Binding. DATE 1998: 377-383
- 1997
- [c1]Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess: Constraint Analysis for DSP Code Generation. ISSS 1997: 33-40
Coauthor Index
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last updated on 2013-04-24 23:04 CEST by the dblp team