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 | 2013 | |
|---|---|---|
| j44 |      | Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra: Low Cost NBTI Degradation Detection and Masking Approaches. IEEE Trans. Computers 62(3): 496-509 (2013) |
| 2012 | ||
| j43 | | Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam: New Design for Testability Approach for Clock Fault Testing. IEEE Trans. Computers 61(4): 448-457 (2012) |
| c83 | | Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, M. Bagatin, Alessandro Paccagnella: High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT 2012: 121-125 |
| c82 | | Martin Omaña, Daniele Rossi, G. Collepalumbo, Cecilia Metra, Fabrizio Lombardi: Faults affecting the control blocks of PV arrays and techniques for their concurrent detection. DFT 2012: 199-204 |
| 2011 | ||
| j42 | | Cecilia Metra, Rajesh Galivanche: Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems. IEEE Trans. Computers 60(9): 1217-1218 (2011) |
| j41 | | Martin Omaña, Cecilia Metra, T. M. Mak, Simon Tam: Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation High Performance Microprocessors. IEEE Trans. VLSI Syst. 19(12): 2322-2325 (2011) |
| c81 | | Daniele Rossi, N. Timoncini, M. Spica, Cecilia Metra: Error correcting code analysis for cache memory high reliability and performance. DATE 2011: 1620-1625 |
| c80 | | Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella: Impact of Aging Phenomena on Soft Error Susceptibility. DFT 2011: 18-24 |
| c79 | | Daniele Giaffreda, Martin Omaña, Daniele Rossi, Cecilia Metra: Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition. DFT 2011: 252-258 |
| 2010 | ||
| j40 | | Martin Omaña, Daniele Rossi, Cecilia Metra: High-Performance Robust Latches. IEEE Trans. Computers 59(11): 1455-1465 (2010) |
| c78 | | Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra: Novel low-cost aging sensor. Conf. Computing Frontiers 2010: 93-94 |
| c77 | | Daniele Rossi, Martin Omaña, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche: Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors. Conf. Computing Frontiers 2010: 113-114 |
| c76 | | Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra: Secure communication protocol for wireless sensor networks. EWDTS 2010: 17-20 |
| 2009 | ||
| j39 | | Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi: Detecting Multiple Faults in One-Dimensional Arrays of Reversible QCA Gates. J. Electronic Testing 25(1): 39-54 (2009) |
| j38 | | Michele Favalli, Cecilia Metra: Testing Resistive Opens and Bridging Faults Through Pulse Propagation. IEEE Trans. on CAD of Integrated Circuits and Systems 28(6): 915-925 (2009) |
| j37 | | Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee: Accurate Linear Model for SET Critical Charge Estimation. IEEE Trans. VLSI Syst. 17(8): 1161-1166 (2009) |
| c75 | | |
| c74 | | Martin Omaña, Marcin Marzencki, Roberto Specchia, Cecilia Metra, Bozena Kaminska: Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors. DFT 2009: 127-135 |
| 2008 | ||
| j36 | | Daniele Rossi, André K. Nieuwland, Cecilia Metra: Simultaneous Switching Noise: The Relation between Bus Layout and Coding. IEEE Design & Test of Computers 25(1): 76-86 (2008) |
| j35 | | Daniele Rossi, Martin Omaña, Cecilia Metra: Checkers' No-Harm Alarms and Design Approaches to Tolerate Them. J. Electronic Testing 24(1-3): 93-103 (2008) |
| j34 | | Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi: Reversible Gates and Testability of One Dimensional Arrays of Molecular QCA. J. Electronic Testing 24(1-3): 297-311 (2008) |
| j33 | | Daniele Rossi, André K. Nieuwland, Steven V. E. S. van Dijk, Richard P. Kleihorst, Cecilia Metra: Power Consumption of Fault Tolerant Busses. IEEE Trans. VLSI Syst. 16(5): 542-553 (2008) |
| c73 | | Cecilia Metra, Martin Omaña, T. M. Mak, Asifur Rahman, Simon Tam: Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors. DFT 2008: 465-473 |
| c72 | | Daniele Rossi, Paolo Angelini, Cecilia Metra, Giovanni Campardo, Gianpietro P. Vanalli: Risks for Signal Integrity in System in Package and Possible Remedies. European Test Symposium 2008: 165-170 |
| c71 | | Cecilia Metra, Daniele Rossi, Martin Omaña, Abhijit Jas, Rajesh Galivanche: Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. European Test Symposium 2008: 171-176 |
| 2007 | ||
| j32 | | Fabrizio Lombardi, Cecilia Metra: Guest Editors' Introduction: The State of the Art in Nanoscale CAD. IEEE Design & Test of Computers 24(4): 302-303 (2007) |
| j31 | | Cecilia Metra, Daniele Rossi, T. M. Mak: Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality?. IEEE Trans. Computers 56(3): 415-428 (2007) |
| j30 | | Martin Omaña, Daniele Rossi, Cecilia Metra: Latch Susceptibility to Transient Faults and New Hardening Approach. IEEE Trans. Computers 56(9): 1255-1268 (2007) |
| c70 | | Michele Favalli, Cecilia Metra: Interactive presentation: Pulse propagation for the detection of small delay defects. DATE 2007: 1295-1300 |
| c69 | | Jing Huang, Xiaojun Ma, Cecilia Metra, Fabrizio Lombardi: Testing Reversible One-Dimensional QCA Arrays for Multiple Faults. DFT 2007: 469-477 |
| c68 | | Daniele Rossi, Paolo Angelini, Cecilia Metra: Configurable Error Control Scheme for NoC Signal Integrity. IOLTS 2007: 43-48 |
| c67 | | Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam: Novel compensation scheme for local clocks of high performance microprocessors. ITC 2007: 1-9 |
| c66 | | Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam: Novel Approach to Clock Fault Testing for High Performance Microprocessors. VTS 2007: 441-446 |
| 2006 | ||
| j29 | | Jien-Chung Lo, Cecilia Metra, Fabrizio Lombardi: Guest Editors' Introduction: Special Section on Design and Test of Systems-on-Chip (SoC). IEEE Trans. Computers 55(2): 97-98 (2006) |
| c65 | | Daniele Rossi, Carlo Steiner, Cecilia Metra: Analysis of the impact of bus implemented EDCs on on-chip SSN. DATE 2006: 59-64 |
| c64 | | Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra: Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. DATE 2006: 170-175 |
| c63 |  | Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak: Can Clock Faults be Detected Through Functional Test? DDECS 2006: 168-173 |
| c62 | | Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi: Testing Reversible 1D Arrays for Molecular QCA. DFT 2006: 71-79 |
| c61 | | Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak: Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. IOLTS 2006: 17-22 |
| c60 | | Daniele Rossi, Martin Omaña, Cecilia Metra, Andrea Pagni: Checker No-Harm Alarm Robustness. IOLTS 2006: 275-280 |
| 2005 | ||
| j28 | | Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra: Exploiting ECC Redundancy to Minimize Crosstalk Impact. IEEE Design & Test of Computers 22(1): 59-70 (2005) |
| j27 | | Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra: New ECC for Crosstalk Impact Minimization. IEEE Design & Test of Computers 22(4): 340-348 (2005) |
| j26 | | José Manuel Cazeaux, Daniele Rossi, Cecilia Metra: Self-Checking Voter for High Speed TMR Systems. J. Electronic Testing 21(4): 377-389 (2005) |
| j25 | | Martin Omaña, Daniele Rossi, Cecilia Metra: Low Cost and High Speed Embedded Two-Rail Code Checker. IEEE Trans. Computers 54(2): 153-164 (2005) |
| j24 | | José Manuel Cazeaux, Martin Omaña, Cecilia Metra: Novel on-chip circuit for jitter testing in high-speed PLLs. IEEE T. Instrumentation and Measurement 54(5): 1779-1788 (2005) |
| c59 | | Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak: The Other Side of the Timing Equation: a Result of Clock Faults. DFT 2005: 169-177 |
| c58 | | Daniele Rossi, Martin Omaña, Fabio Toma, Cecilia Metra: Multiple Transient Faults in Logic: An Issue for Next Generation ICs. DFT 2005: 352-360 |
| c57 | | José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee: On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS 2005: 23-28 |
| c56 | | Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Cecilia Metra: Load and Logic Co-Optimization for Design of Soft-Error Resistant Nanometer CMOS Circuits. IOLTS 2005: 35-40 |
| c55 | | Martin Omaña, O. Losco, Cecilia Metra, Andrea Pagni: On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization. IOLTS 2005: 163-168 |
| c54 | | André K. Nieuwland, Atul Katoch, Daniele Rossi, Cecilia Metra: Coding Techniques for Low Switching Noise in Fault Tolerant Busses. IOLTS 2005: 183-189 |
| c53 | | Martin Omaña, Daniele Rossi, Cecilia Metra: Low Cost Scheme for On-Line Clock Skew Compensation. VTS 2005: 90-95 |
| 2004 | ||
| j23 | | André Ivanov, Fabrizio Lombardi, Cecilia Metra: Guest Editors' Introduction: Advances in VLSI Testing at MultiGbps Rates. IEEE Design & Test of Computers 21(4): 274-276 (2004) |
| j22 | | |
| j21 | | Martin Omaña, Daniele Rossi, Cecilia Metra: Model for Transient Fault Susceptibility of Combinational Circuits. J. Electronic Testing 20(5): 501-509 (2004) |
| j20 | | Cecilia Metra, Stefano Di Francescantonio, T. M. Mak: Implications of Clock Distribution Faults and Issues with Screening Them during Manufacturing Testing. IEEE Trans. Computers 53(5): 531-546 (2004) |
| j19 | | Michele Favalli, Cecilia Metra: TMR voting in the presence of crosstalk faults at the voter inputs. IEEE Transactions on Reliability 53(3): 342-348 (2004) |
| c52 | | Cecilia Metra, T. M. Mak, Martin Omaña: Fault secureness need for next generation high performance microprocessor design for testability structures. Conf. Computing Frontiers 2004: 444-450 |
| c51 | | Cecilia Metra, T. M. Mak, Martin Omaña: Are Our Design for Testability Features Fault Secure? DATE 2004: 714-715 |
| c50 | | Martin Omaña, Daniele Rossi, Cecilia Metra: Fast and Low-Cost Clock Deskew Buffer. DFT 2004: 202-210 |
| c49 | | José Manuel Cazeaux, Martin Omaña, Cecilia Metra: Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop. IOLTS 2004: 17-24 |
| c48 | | José Manuel Cazeaux, Daniele Rossi, Cecilia Metra: New High Speed CMOS Self-Checking Voter. IOLTS 2004: 58-66 |
| c47 | | Daniele Rossi, A. Muccio, André K. Nieuwland, Atul Katoch, Cecilia Metra: Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems. IOLTS 2004: 135-140 |
| c46 | | Cecilia Metra, A. Ferrari, Martin Omaña, Andrea Pagni: Hardware Reconfiguration Scheme for High Availability Systems. IOLTS 2004: 161-166 |
| c45 | | Cecilia Metra, T. M. Mak, Martin Omaña: Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing. ITC 2004: 1223-1231 |
| 2003 | ||
| j18 | | |
| j17 | | Daniele Rossi, Cecilia Metra: Error Correcting Strategy for High Speed and High Density Reliable Flash Memories. J. Electronic Testing 19(5): 511-521 (2003) |
| j16 | | Cecilia Metra, Stefano Di Francescantonio, Michele Favalli, Bruno Riccò: Scan flip-flops with on-line testing ability with respect to input delay and crosstalk faults. Microelectronics Journal 34(1): 23-29 (2003) |
| j15 | | Luca Schiano, Cecilia Metra, Diego Marino: Self-checking design, implementation, and measurement of a controller for track-side railway systems. IEEE T. Instrumentation and Measurement 52(6): 1722-1728 (2003) |
| j14 | | Cecilia Metra, Luca Schiano, Michele Favalli: Concurrent detection of power supply noise. IEEE Transactions on Reliability 52(4): 469-475 (2003) |
| c44 | | Martin Omaña, Daniele Rossi, Cecilia Metra: High Speed and Highly Testable Parallel Two-Rail Code Checker. DATE 2003: 10608-10615 |
| c43 | | Cecilia Metra, T. M. Mak, Daniele Rossi: Clock Calibration Faults and their Impact on Quality of High Performance Microprocessors. DFT 2003: 63-70 |
| c42 | | Daniele Rossi, S. Cavallotti, Cecilia Metra: Error Correcting Codes for Crosstalk Effect Minimization. DFT 2003: 257- |
| c41 | | Cecilia Metra, Stefano Di Francescantonio, Martin Omaña: Automatic Modification of Sequential Circuits for Self-Checking Implementation. DFT 2003: 417-424 |
| c40 | | Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, André K. Nieuwland, Cecilia Metra: Power Consumption of Fault Tolerant Codes: the Active Elements. IOLTS 2003: 61-67 |
| c39 | | Martin Omaña, Giacinto Papasso, Daniele Rossi, Cecilia Metra: A Model for Transient Fault Propagation in Combinatorial Logic. IOLTS 2003: 111- |
| c38 | | L. Di Silvio, Daniele Rossi, Cecilia Metra: Crosstalk Effect Minimization for Encoded Busses. IOLTS 2003: 214-218 |
| c37 | | Martin Omaña, Daniele Rossi, Cecilia Metra: Novel Transient Fault Hardened Static Latch. ITC 2003: 886-892 |
| 2002 | ||
| j13 | | Michele Favalli, Cecilia Metra: Online Testing Approach for Very Deep-Submicron ICs. IEEE Design & Test of Computers 19(2): 16-23 (2002) |
| j12 | | Dimitris Nikolos, John P. Hayes, Michael Nicolaidis, Cecilia Metra: Guest Editorial. J. Electronic Testing 18(3): 259-260 (2002) |
| j11 | | Michele Favalli, Cecilia Metra: Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures. J. Electronic Testing 18(3): 273-283 (2002) |
| j10 | | Cecilia Metra, Michele Favalli, Stefano Di Francescantonio, Bruno Riccò: On-Chip Clock Faults' Detector. J. Electronic Testing 18(4-5): 555-564 (2002) |
| c36 | | Michele Favalli, Cecilia Metra: Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths. DATE 2002: 612-617 |
| c35 | | Cecilia Metra, Luca Schiano, Bruno Riccò, Michele Favalli: Self-Checking Scheme for the On-Line Testing of Power Supply Noise. DATE 2002: 832-836 |
| c34 | | Cecilia Metra, Stefano Di Francescantonio, Giuseppe Marrale: On-Line Testing of Transient Faults Affecting Functional Blocks of FCMOS, Domino and FPGA-Implemented Self-Checking Circuits. DFT 2002: 207-215 |
| c33 | | Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, A. H. Nieuwland, Cecilia Metra: Coding Scheme for Low Energy Consumption Fault-Tolerant Bus. IOLTW 2002: 8-12 |
| c32 | | Daniele Rossi, Cecilia Metra, Bruno Riccò: Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. IOLTW 2002: 221-225 |
| c31 | | Luca Schiano, Cecilia Metra, Diego Marino: Design and Implementation of a Self-Checking Scheme for Railway Trackside Systems. IOLTW 2002: 243- |
| c30 | | Cecilia Metra, Stefano Di Francescantonio, T. M. Mak: Clock Faults? Impact on Manufacturing Testing and Their Possible Detection Through On-Line Testing. ITC 2002: 100-109 |
| c29 | | Daniele Rossi, Cecilia Metra, Bruno Riccò: Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. MTDT 2002: 27-31 |
| c28 | | Luca Schiano, Cecilia Metra, Diego Marino: Design and Implementation of a Self-Checking Scheme for Railway Trackside Systems. MTDT 2002: 49-56 |
| 2001 | ||
| j9 | | Fabrizio Lombardi, Cecilia Metra: Guest Editors' Introduction: Defect-Oriented Diagnosis for Very Deep-Submicron Systems. IEEE Design & Test of Computers 18(1): 8-9 (2001) |
| c27 | | Michele Favalli, Cecilia Metra: Optimization of error detecting codes for the detection of crosstalk originated errors. DATE 2001: 290-296 |
| c26 | | Cecilia Metra, Stefano Di Francescantonio, Bruno Riccò, T. M. Mak: Evaluation of Clock Distribution Networks' Most Likely Faults and Produced Effects. DFT 2001: 357-365 |
| c25 | | Monica Alderighi, Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra: Novel Fault-Tolerant Adder Design for FPGA-Based Systems. IOLTW 2001: 54- |
| c24 | | Michele Favalli, Cecilia Metra: Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures. IOLTW 2001: 100-105 |
| c23 | | Cecilia Metra, Andrea Pagano, Bruno Riccò: On-line testing of transient and crosstalk faults affecting interconnections of FPGA-implemented systems. ITC 2001: 939-947 |
| 2000 | ||
| j8 | | Cecilia Metra, Jien-Chung Lo: Intermediacy Prediction for High Speed Berger Code Checkers. J. Electronic Testing 16(6): 607-615 (2000) |
| j7 | | Michele Favalli, Cecilia Metra: Bridging Faults in Pipelined Circuits. J. Electronic Testing 16(6): 617-629 (2000) |
| j6 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Self-Checking Detection and Diagnosis of Transient, Delay, and Crosstalk Faults Affecting Bus Lines. IEEE Trans. Computers 49(6): 560-574 (2000) |
| c22 | | Cecilia Metra, Michele Favalli, Bruno Riccò: On-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values. DATE 2000: 763 |
| c21 | | Monica Alderighi, Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra: Achieving Fault-Tolerance by Shifted and Rotated Operands in TMR Non-Diverse ALUs. DFT 2000: 155-163 |
| 1999 | ||
| j5 | | Michele Favalli, Cecilia Metra: Bus crosstalk fault-detection capabilities of error-detecting codes for on-line testing. IEEE Trans. VLSI Syst. 7(3): 392-396 (1999) |
| c20 | | Michele Favalli, Cecilia Metra: On the Design of Self-Checking Functional Units Based on Shannon Circuits. DATE 1999: 368-375 |
| c19 | | Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra: Transient and Permanent Fault Diagnosis for FPGA-Based TMR Systems. DFT 1999: 330-338 |
| c18 | | Cecilia Metra, Flavio Giovanelli, Mani Soma, Bruno Riccò: Self-checking scheme for very fast clocks' skew correction. ITC 1999: 652-661 |
| 1998 | ||
| j4 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Concurrent Checking of Clock Signal Correctness. IEEE Design & Test of Computers 15(4): 42-48 (1998) |
| c17 | | Cecilia Metra, Michel Renovell, G. Mojoli, Jean Michel Portal, Sandro Pastore, Joan Figueras, Yervant Zorian, Davide Salvi, Giacomo R. Sechi: Novel Technique for Testing FPGAs. DATE 1998: 89-94 |
| c16 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Highly Testable and Compact 1-out-of-n Code Checker with Single Output. DATE 1998: 981-982 |
| c15 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Signal Coding Technique and CMOS Gates for Strongly Fault-Secure Combinational Functional Blocks. DFT 1998: 174-182 |
| c14 | | Sergio D'Angelo, Cecilia Metra, Sandro Pastore, A. Pogutz, Giacomo R. Sechi: Fault-Tolerant Voting Mechanism and Recovery Scheme for TMR FPGA-Based Systems. DFT 1998: 233-240 |
| c13 | | Cecilia Metra, Michele Favalli, Bruno Riccò: On-line detection of logic errors due to crosstalk, delay, and transient faults. ITC 1998: 524-533 |
| 1997 | ||
| j3 | | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò: On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 770-776 (1997) |
| c12 | | |
| c11 | | Yu-Yau Guo, Jien-Chung Lo, Cecilia Metra: Fast and area-time efficient Berger code checkers. DFT 1997: 110-118 |
| c10 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Compact and low power on-line self-testing voting scheme. DFT 1997: 137-147 |
| c9 | | Michele Favalli, Cecilia Metra: Low-level error recovery mechanism for self-checking sequential circuits. DFT 1997: 234-242 |
| c8 | | Cecilia Metra, Michele Favalli, Bruno Riccò: On-Line Testing Scheme for Clock's Faults. ITC 1997: 587-596 |
| c7 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Highly testable and compact single output comparator. VTS 1997: 210-215 |
| 1996 | ||
| j2 | | Michele Favalli, Cecilia Metra: Sensing circuit for on-line detection of delay faults. IEEE Trans. VLSI Syst. 4(1): 130-133 (1996) |
| c6 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Embedded two-rail checkers with on-line testing ability. VTS 1996: 145-150 |
| 1995 | ||
| j1 | | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò: Design of CMOS checkers with improved testability of bridging and transistor stuck-on faults. J. Electronic Testing 6(1): 7-22 (1995) |
| 1994 | ||
| c5 | | Cecilia Metra, Michele Favalli, Bruno Riccò: CMOS Self Checking Circuits with Faulty Sequential Functional Block. DFT 1994: 133-141 |
| c4 | | Cecilia Metra, Michele Favalli, Bruno Riccò: Highly Testable and Compact 1-out-of-n CMOS Checkers. DFT 1994: 142-150 |
| 1993 | ||
| c3 | | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò: Design Rules for CMOS Self Checking Circuits with Parametric Faults in the Functional Block. DFT 1993: 271-278 |
| c2 | | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò: A Highly Testable 1-out-of-3 CMOS Checker. DFT 1993: 279-286 |
| 1992 | ||
| c1 | | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò: CMOS Checkers with Testable Bridging and Transistor Stuck-on Faults. ITC 1992: 948-957 |
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