| 2012 | ||
|---|---|---|
| j23 | Haralampos-G. D. Stratigopoulos, Salvador Mir: Adaptive Alternate Analog Test. IEEE Design & Test of Computers 29(4): 71-79 (2012) | |
| j22 | Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir, Camelia Hora, Yizi Xing, Bram Kruseman: Diagnosis of Local Spot Defects in Analog Circuits. IEEE T. Instrumentation and Measurement 61(10): 2701-2712 (2012) | |
| c46 | Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet: Testing RF circuits with true non-intrusive built-in sensors. DATE 2012: 1090-1095 | |
| c45 | Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Herve Naudet, Christophe Forel: Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs. European Test Symposium 2012: 1-6 | |
| c44 | Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma: Experiences with non-intrusive sensors for RF built-in test. ITC 2012: 1-8 | |
| c43 | Nourredine Akkouche, Salvador Mir, Emmanuel Simeu, Mustapha Slamani: Analog/RF test ordering in the early stages of production testing. VTS 2012: 25-30 | |
| 2011 | ||
| j21 | Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma: RF Front-End Test Using Built-in Sensors. IEEE Design & Test of Computers 28(6): 76-84 (2011) | |
| j20 | Ahcène Bounceur, Salvador Mir, Haralampos-G. D. Stratigopoulos: Estimation of Analog Parametric Test Metrics Using Copulas. IEEE Trans. on CAD of Integrated Circuits and Systems 30(9): 1400-1410 (2011) | |
| c42 | Alexios Spyronasios, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir: On Replacing an RF Test with an Alternative Measurement: Theory and a Case Study. Asian Test Symposium 2011: 365-370 | |
| c41 | Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir: Implicit test of high-speed analog circuits using non-intrusive sensors. ECCTD 2011: 652 | |
| 2010 | ||
| j19 | Fabio Cenni, Jeremie Cazalbou, Salvador Mir, Libor Rufer: Design of a SAW-based chemical sensor with its microelectronics front-end interface. Microelectronics Journal 41(11): 723-732 (2010) | |
| c40 | Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir: Bayesian Fault Diagnosis of RF Circuits Using Nonparametric Density Estimation. Asian Test Symposium 2010: 295-298 | |
| c39 | Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir: Fault diagnosis of analog circuits based on machine learning. DATE 2010: 1761-1766 | |
| c38 | Gustavo P. Rehder, Salvador Mir, Libor Rufer, Emmanuel Simeu, Hoang Nam Nguyen: Low Frequency Test for RF MEMS Switches. DELTA 2010: 350-354 | |
| c37 | Louay Abdallah, Haralampos-G. D. Stratigopoulos, Christophe Kelma, Salvador Mir: Sensors for built-in alternate RF test. European Test Symposium 2010: 49-54 | |
| c36 | Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev: Defect filter for alternate RF test. European Test Symposium 2010: 265-270 | |
| c35 | Haralampos-G. D. Stratigopoulos, Salvador Mir: Analog test metrics estimates with PPM accuracy. ICCAD 2010: 241-247 | |
| c34 | Rafik Khereddine, Louay Abdallah, Emmanuel Simeu, Salvador Mir, Fabio Cenni: Adaptive Logical Control of RF LNA Performances for Efficient Energy Consumption. VLSI-SoC (Selected Papers) 2010: 43-68 | |
| c33 | Rafik Khereddine, Louay Abdallah, Emmanuel Simeu, Salvador Mir, Fabio Cenni: Adaptive logical control of RF LNA performances for efficient energy consumption. VLSI-SoC 2010: 161-166 | |
| c32 | Salvador Mir, Haralampos-G. D. Stratigopoulos, Ahcène Bounceur: Density estimation for analog/RF test problem solving. VTS 2010: 41 | |
| c31 | Nourredine Akkouche, Salvador Mir, Emmanuel Simeu: Ordering of analog specification tests based on parametric defect level estimation. VTS 2010: 301-306 | |
| 2009 | ||
| j18 | Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur, Emmanuel Simeu: Pseudorandom BIST for test and characterization of linear and nonlinear MEMS. Microelectronics Journal 40(7): 1054-1061 (2009) | |
| j17 | Haralampos-G. D. Stratigopoulos, Salvador Mir, Ahcène Bounceur: Evaluation of Analog/RF Test Measurements at the Design Stage. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 582-590 (2009) | |
| c30 | Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris: Enrichment of limited training sets in machine-learning-based analog/RF test. DATE 2009: 1668-1673 | |
| c29 | Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev: Defect Filter for Alternate RF Test. European Test Symposium 2009: 101-106 | |
| c28 | Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir: Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study. ICCD 2009: 78-83 | |
| c27 | Livier Lizarraga, Salvador Mir, Gilles Sicard: Experimental Validation of a BIST Techcnique for CMOS Active Pixel Sensors. VTS 2009: 189-194 | |
| 2008 | ||
| j16 | Emmanuel Simeu, Hoang Nam Nguyen, Philippe Cauvet, Salvador Mir, Libor Rufer, Rafik Khereddine: Using Signal Envelope Detection for Online and Offline RF MEMS Switch Testing. VLSI Design 2008 (2008) | |
| c26 | Haralampos-G. D. Stratigopoulos, Jeanne Tongbong, Salvador Mir: A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation. DATE 2008: 68-73 | |
| 2007 | ||
| j15 | Ahcène Bounceur, Salvador Mir, Emmanuel Simeu, Luís Rolíndez: Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing. J. Electronic Testing 23(6): 471-484 (2007) | |
| c25 | Jeanne Tongbong, Salvador Mir, Jean-Louis Carbonéro: Interactive presentation: Evaluation of test measures for LNA production testing using a multinormal statistical model. DATE 2007: 731-736 | |
| c24 | Emmanuel Simeu, Salvador Mir, R. Kherreddine, Hoang Nam Nguyen: Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches. IOLTS 2007: 237-243 | |
| c23 | Luís Rolíndez, Salvador Mir, Jean-Louis Carbonéro, Dimitri Goguet, Nabil Chouba: A stereo audio Σ∑ ADC architecture with embedded SNDR self-test. ITC 2007: 1-10 | |
| 2006 | ||
| j14 | Salvador Mir, Kwang-Ting (Tim) Cheng, Andrew Richardson: Guest Editorial. J. Electronic Testing 22(4-6): 311 (2006) | |
| j13 | Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro: A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting. J. Electronic Testing 22(4-6): 325-335 (2006) | |
| j12 | Salvador Mir, Libor Rufer, Achraf Dhayni: Built-in-self-test techniques for MEMS. Microelectronics Journal 37(12): 1591-1597 (2006) | |
| c22 | Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur: Pseudorandom functional BIST for linear and nonlinear MEMS. DATE 2006: 664-669 | |
| c21 | Ahcène Bounceur, Salvador Mir, Luís Rolíndez, Emmanuel Simeu: CAT platform for analogue and mixed-signal test evaluation and optimization. VLSI-SoC 2006: 320-325 | |
| c20 | Livier Lizarraga, Salvador Mir, Gilles Sicard, Ahcène Bounceur: Study of a BIST Technique for CMOS Active Pixel Sensors. VLSI-SoC 2006: 326-331 | |
| c19 | Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro: A SNDR BIST for Sigma-Delta Analogue-to-Digital Converters. VTS 2006: 314-319 | |
| 2005 | ||
| j11 | Libor Rufer, Salvador Mir, Emmanuel Simeu, C. Domingues: On-Chip Pseudorandom MEMS Testing. J. Electronic Testing 21(3): 233-241 (2005) | |
| j10 | Bozena Kaminska, Stephen K. Sunter, Salvador Mir: Analog and mixed signal test techniques for SOC development. Microelectronics Journal 36(12): 1063 (2005) | |
| j9 | Guillaume Prenat, Salvador Mir, Diego Vázquez, Luís Rolíndez: A low-cost digital frequency testing approach for mixed-signal devices using SigmaDelta modulation. Microelectronics Journal 36(12): 1080-1090 (2005) | |
| c18 | Rabeb Kheriji, V. Danelon, Jean-Louis Carbonéro, Salvador Mir: Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach. DATE 2005: 170-171 | |
| c17 | Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur: On-chip Pseudorandom Testing for Linear and Nonlinear MEMS. VLSI-SoC 2005: 245-266 | |
| 2004 | ||
| c16 | Luís Rolíndez, Salvador Mir, Guillaume Prenat, Ahcène Bounceur: A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns. DATE 2004: 706-707 | |
| c15 | Salvador Mir, Benoît Charlot, Libor Rufer, Bernard Courtois: On-chip testing of embedded silicon transducers. SoCC 2004: 13-18 | |
| c14 | Salvador Mir, Libor Rufer, Bernard Courtois: On-chip testing of embedded transducers. VLSI Design 2004: 463- | |
| 2003 | ||
| j8 | C. Roman, Salvador Mir, Benoît Charlot: Building an analogue fault simulation tool and its application to MEMS. Microelectronics Journal 34(10): 897-906 (2003) | |
| c13 | Salvador Mir, Luís Rolíndez, Christian Domigues, Libor Rufer: An implementation of memory-based on-chip analogue test signal generation. ASP-DAC 2003: 663-668 | |
| c12 | Mohammad A. Naal, Emmanuel Simeu, Salvador Mir: On-Line Testable Decimation Filter Design for AMS Systems. IOLTS 2003: 83-88 | |
| 2002 | ||
| c11 | Salvador Mir, H. Bederr, R. D. (Shawn) Blanton, Hans G. Kerkhoff, H. J. Klim: SoCs with MEMS? Can We Include MEMS in the SoCs Design and Test Flow? VTS 2002: 449-450 | |
| 2001 | ||
| j7 | Benoît Charlot, Salvador Mir, Fabien Parrain, Bernard Courtois: Generation of Electrically Induced Stimuli for MEMS Self-Test. J. Electronic Testing 17(6): 459-470 (2001) | |
| c10 | Benoît Charlot, Salvador Mir, Fabien Parrain, Bernard Courtois: Electrically Induced Stimuli For MEMS Self-Test. VTS 2001: 210-217 | |
| 2000 | ||
| j6 | Salvador Mir, Benoît Charlot, Bernard Courtois: Extending Fault-Based Testing to Microelectromechanical Systems. J. Electronic Testing 16(3): 279-288 (2000) | |
| j5 | Marcelo Lubaszewski, Salvador Mir, Vladimir Kolarik, C. Nielsen, Bernard Courtois: Design of self-checking fully differential circuits and boards. IEEE Trans. VLSI Syst. 8(2): 113-128 (2000) | |
| c9 | Salvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz: Towards design and validation of mixed-technology SOCs. ACM Great Lakes Symposium on VLSI 2000: 29-33 | |
| 1999 | ||
| j4 | Salvador Mir, Benoît Charlot: On the Integration of Design and Test for Chips Embedding MEMS. IEEE Design & Test of Computers 16(4): 28-38 (1999) | |
| c8 | Benoît Charlot, Salvador Mir, Érika F. Cota, Marcelo Lubaszewski, Bernard Courtois: Fault modeling of suspended thermal MEMS. ITC 1999: 319-328 | |
| c7 | Bernard Courtois, Jean-Michel Karam, Salvador Mir, Marcelo Lubaszewski, Vladimir Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner: Design and Test of MEMs. VLSI Design 1999: 270- | |
| 1998 | ||
| c6 | Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas: Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. DATE 1998: 810-814 | |
| c5 | A. Castillejo, D. Veychard, Salvador Mir, Jean-Michel Karam, Bernard Courtois: Failure mechanisms and fault classes for CMOS-compatible microelectromechanical systems. ITC 1998: 541-550 | |
| 1997 | ||
| c4 | Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas: SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. DAC 1997: 281-286 | |
| 1996 | ||
| j3 | Salvador Mir, Marcelo Lubaszewski, Bernard Courtois: Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets. J. Electronic Testing 9(1-2): 43-57 (1996) | |
| j2 | Salvador Mir, Marcelo Lubaszewski, Bernard Courtois: Unified built-in self-test for fully differential analog circuits. J. Electronic Testing 9(1-2): 135-151 (1996) | |
| c3 | Marcelo Lubaszewski, Salvador Mir, Leandro Pulz: ABILBO: Analog BuILt-in Block Observer. ICCAD 1996: 600-603 | |
| 1995 | ||
| j1 | Vladimir Kolarik, Salvador Mir, Marcelo Lubaszewski, Bernard Courtois: Analog checkers with absolute and relative tolerances. IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 607-612 (1995) | |
| 1994 | ||
| c2 | Salvador Mir, Nick Filer: Re-engineering hardware specifications by exploiting design semantics. EURO-DAC 1994: 336-341 | |
| c1 | Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, C. Nielsen, Bernard Courtois: Built-in self-test and fault diagnosis of fully differential analogue circuits. ICCAD 1994: 486-490 | |
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