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 | 2006 | |
|---|---|---|
| c10 |      | Andrew Kinane, Valentin Muresan, Noel E. O'Connor: Optimisation of Constant Matrix Multiplication Operation Hardware Using a Genetic Algorithm. EvoWorkshops 2006: 296-307 |
| c9 | | Andrew Kinane, Valentin Muresan, Noel E. O'Connor: Towards an optimised VLSI design algorithm for the constant matrix multiplication problem. ISCAS 2006 |
| c8 | | Daniel Larkin, Andrew Kinane, Valentin Muresan, Noel E. O'Connor: An Efficient Hardware Architecture for a Neural Network Activation Function Generator. ISNN (2) 2006: 1319-1327 |
| 2005 | ||
| c7 |  | Andrew Kinane, Alan Casey, Valentin Muresan, Noel E. O'Connor: FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator. FPT 2005: 317-318 |
| 2004 | ||
| j1 | | Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu: Greedy Tree Growing Heuristics on Block-Test Scheduling Under Power Constraints. J. Electronic Testing 20(1): 61-78 (2004) |
| c6 | | Andrew Kinane, Valentin Muresan, Noel E. O'Connor, Noel Murphy, Seán Marlow: Energy-Efficient Hardware Architecture for Variable N-point 1D DCT. PATMOS 2004: 780-788 |
| 2001 | ||
| c5 | | Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu: Mixed Classical Scheduling Algorithms and Tree Growing Technique in Block-Test Scheduling under Power Constraints. IEEE International Workshop on Rapid System Prototyping 2001: 162-167 |
| 2000 | ||
| c4 | | Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu: Distribution-graph based approach and extended tree growing technique in power-constrained block-test scheduling. Asian Test Symposium 2000: 465-470 |
| c3 | | Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu: A comparison of classical scheduling approaches in power-constrained block-test scheduling. ITC 2000: 882-891 |
| c2 | | Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu: Power-Constrained Block-Test List Scheduling. IEEE International Workshop on Rapid System Prototyping 2000: 182-187 |
| c1 | | Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu: The Left Edge Algorithm and the Tree Growing Technique in Block-Test Scheduling under Power Constraints. VTS 2000: 417-422 |
| 1 | Alan Casey | |
| 2 | Andrew Kinane | |
| 3 | Daniel Larkin | |
| 4 | Seán Marlow | |
| 5 | Valentina Muresan | |
| 6 | Noel Murphy | |
| 7 | Noel E. O'Connor | |
| 8 | Mircea Vladutiu | |
| 9 | Xiaojun Wang |
Colors in the list of coauthors
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