| 2012 | ||
|---|---|---|
| j11 | Anand Ramalingam, Ashish Kumar Singh, Sani R. Nassif, Gi-Joon Nam, Michael Orshansky, David Z. Pan: An accurate sparse-matrix based framework for statistical static timing analysis. Integration 45(4): 365-375 (2012) | |
| c31 | Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Cliff C. N. Sze, Natarajan Viswanathan, Nancy Y. Zhou: Guiding a physical design closure system to produce easier-to-route designs with more predictable timing. DAC 2012: 465-470 | |
| c30 | Charles J. Alpert, Zhuo Li, Gi-Joon Nam, Chin Ngai Sze, Natarajan Viswanathan, Samuel I. Ward: Placement: Hot or Not? ICCAD 2012: 283-290 | |
| 2011 | ||
| j10 | David A. Papa, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Natarajan Viswanathan, Gi-Joon Nam, Igor L. Markov: Physical Synthesis with Clock-Network Optimization for Large Systems on Chips. IEEE Micro 31(4): 51-62 (2011) | |
| c29 | Seungwhun Paik, Gi-Joon Nam, Youngsoo Shin: Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power. ICCAD 2011: 640-646 | |
| c28 | Natarajan Viswanathan, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Gi-Joon Nam, Jarrod A. Roy: The ISPD-2011 routability-driven placement contest and benchmark suite. ISPD 2011: 141-146 | |
| c27 | Jeonghee Shin, John A. Darringer, Guojie Luo, Merav Aharoni, Alexey Lvov, Gi-Joon Nam, Michael B. Healy: Floorplanning challenges in early chip planning. SoCC 2011: 388-393 | |
| 2010 | ||
| j9 | Gi-Joon Nam, Prashant Saxena: Guest Editorial. IEEE Trans. on CAD of Integrated Circuits and Systems 29(2): 169-170 (2010) | |
| c26 | Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li, Gi-Joon Nam, Charles B. Winn: Detecting tangled logic structures in VLSI netlists. DAC 2010: 603-608 | |
| c25 | Taraneh Taghavi, Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Andrew D. Huber, Shyam Ramji: New placement prediction and mitigation techniques for local routing congestion. ICCAD 2010: 621-624 | |
| c24 | Yi-Lin Chuang, Gi-Joon Nam, Charles J. Alpert, Yao-Wen Chang, Jarrod A. Roy, Natarajan Viswanathan: Design-hierarchy aware mixed-size placement for routability optimization. ICCAD 2010: 663-668 | |
| c23 | Charles J. Alpert, Zhuo Li, Michael D. Moffitt, Gi-Joon Nam, Jarrod A. Roy, Gustavo E. Téllez: What makes a design difficult to route. ISPD 2010: 7-12 | |
| c22 | Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy, Zhuo Li, Charles J. Alpert, Shyam Ramji, Chris Chu: ITOP: integrating timing optimization within placement. ISPD 2010: 83-90 | |
| 2009 | ||
| c21 | Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: CRISP: Congestion reduction by iterated spreading during placement. ICCAD 2009: 357-362 | |
| c20 | Cliff N. Sze, Phillip Restle, Gi-Joon Nam, Charles J. Alpert: Ispd2009 clock network synthesis contest. ISPD 2009: 149-150 | |
| e2 | Gi-Joon Nam, Prashant Saxena (Eds.): Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009. ACM 2009, isbn 978-1-60558-449-2 | |
| 2008 | ||
| j8 | David Z. Pan, Gi-Joon Nam: Guest Editorial. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2105-2106 (2008) | |
| j7 | David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2156-2168 (2008) | |
| c19 | David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm. ISPD 2008: 2-9 | |
| c18 | Gi-Joon Nam, Cliff C. N. Sze, Mehmet Can Yildiz: The ISPD global routing benchmark suite. ISPD 2008: 156-159 | |
| e1 | David Z. Pan, Gi-Joon Nam (Eds.): Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008. ACM 2008, isbn 978-1-60558-048-7 | |
| 2007 | ||
| j6 | Haoxing Ren, David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam: Diffusion-Based Placement Migration With Application on Legalization. IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2158-2172 (2007) | |
| c17 | Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia: Hippocrates: First-Do-No-Harm Detailed Placement. ASP-DAC 2007: 141-146 | |
| c16 | Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han: Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214 | |
| c15 | Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu: RQL: Global Placement via Relaxed Quadratic Spreading and Linearization. DAC 2007: 453-458 | |
| c14 | Gi-Joon Nam, Mehmet Can Yildiz, David Z. Pan, Patrick H. Madden: ISPD placement contest updates and ISPD 2007 global routing contest. ISPD 2007: 167 | |
| c13 | Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz: The nuts and bolts of physical synthesis. SLIP 2007: 89-94 | |
| 2006 | ||
| j5 | Gi-Joon Nam, Sherief Reda, Charles J. Alpert, Paul Villarrubia, Andrew B. Kahng: A Fast Hierarchical Quadratic Placement Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 25(4): 678-691 (2006) | |
| c12 | Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan: An accurate sparse matrix based framework for statistical static timing analysis. ICCAD 2006: 231-236 | |
| c11 | ||
| 2005 | ||
| j4 | Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake: Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications. IEEE Trans. VLSI Syst. 13(10): 1167-1178 (2005) | |
| c10 | Charles J. Alpert, Gi-Joon Nam, Paul Villarribua, Mehmet Can Yildiz: Placement stability metrics. ASP-DAC 2005: 1144-1147 | |
| c9 | Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, Sherief Reda, Paul Villarrubia: A semi-persistent clustering technique for VLSI circuit placement. ISPD 2005: 200-207 | |
| c8 | Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Bruce Winter, Mehmet Can Yildiz: The ISPD2005 placement contest and benchmark suite. ISPD 2005: 216-220 | |
| 2004 | ||
| j3 | Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar: A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints. IEEE Trans. Computers 53(6): 688-696 (2004) | |
| 2003 | ||
| j2 | Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia: Effective free space management for cut-based placement via analytical constraint generation. IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1343-1353 (2003) | |
| 2002 | ||
| j1 | Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar: A new FPGA detailed routing approach via search-based Booleansatisfiability. IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 674-684 (2002) | |
| c7 | Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar: Hybrid Routing for FPGAs by Integrating Boolean Satisfiability with Geometric Search. FPL 2002: 360-369 | |
| c6 | Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia: Free space management for cut-based placement. ICCAD 2002: 746-751 | |
| 2001 | ||
| c5 | Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake: Two-Dimensional Position Detection System with MEMS Accelerometer for MOUSE Applications. DAC 2001: 852-857 | |
| c4 | Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar: A boolean satisfiability-based incremental rerouting approach with application to FPGAs. DATE 2001: 560-565 | |
| c3 | Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar: A comparative study of two Boolean formulations of FPGA detailed routing constraints. ISPD 2001: 222-227 | |
| 1999 | ||
| c2 | Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar: Satisfiability-Based Layout Revisited: Detailed Routing of Complex FPGAs vis Search-Based Boolean SAT. FPGA 1999: 167-175 | |
| c1 | Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar: Satisfiability-Based Detailed FPGA Routing. VLSI Design 1999: 574-577 | |
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