Giorgio Di Natale

Amitabh Das, Jean DaRolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede: Secure JTAG Implementation Using Schnorr Protocol. J. Electronic Testing 29(2): 193-209 (2013)

Jean DaRolt, Amitabh Das, Santosh Ghosh, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede: Scan attacks on side-channel and fault attack resistant public-key implementations. J. Cryptographic Engineering 2(4): 207-219 (2012)

R. Possamai Bastos, F. Sill Torres, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode. Microelectronics Reliability 52(9-10): 1781-1786 (2012)

Alessandro Savino, Stefano Di Carlo, Gianfranco Politano, Alfredo Benso, Alberto Bosio, Giorgio Di Natale: Statistical Reliability Estimation of Microprocessor-Based Systems. IEEE Trans. Computers 61(11): 1521-1534 (2012)

Jean DaRolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede: A New Scan Attack on RSA in Presence of Industrial Countermeasures. COSADE 2012: 89-104

Jean DaRolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede: A scan-based attack on Elliptic Curve Cryptosystems in presence of industrial Design-for-Testability structures. DFT 2012: 43-48

Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: On-chip test comparison for protecting confidential data in secure ICs. European Test Symposium 2012: 1

Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Are advanced DfT structures sufficient for preventing scan-attacks? VTS 2012: 246-251

Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Miroslav Valka, Denis Réal: Power consumption traces realignment to improve differential power analysis. DDECS 2011: 201-206

Rodrigo P. Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: A New Bulk Built-In Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies. DFT 2011: 302-308

Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Scan Attacks and Countermeasures in Presence of Scan Response Compactors. European Test Symposium 2011: 19-24

Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: New security threats against chips containing scan chain structures. HOST 2011: 110

Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre: Self-Test Techniques for Crypto-Devices. IEEE Trans. VLSI Syst. 18(2): 329-333 (2010)

Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Ensuring high testability without degrading security: Embedded tutorial on "test and security". DDECS 2010: 6

Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers. DELTA 2010: 256-261

K. Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Evaluation of concurrent error detection techniques on the Advanced Encryption Standard. European Test Symposium 2010: 252

K. Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: Evaluation of concurrent error detection techniques on the advanced encryption standard. IOLTS 2010: 223-228

Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre: A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard. J. Electronic Testing 25(4-5): 269-278 (2009)

Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: March Test Generation Revealed. IEEE Trans. Computers 57(12): 1704-1713 (2008)

Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: An Integrated Validation Environment for Differential Power Analysis. DELTA 2008: 527-532

Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre: A Reliable Architecture for the Advanced Encryption Standard. European Test Symposium 2008: 13-18

Philipp Öhler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand: A Modular Memory BIST for Optimized Memory Repair. IOLTS 2008: 171-172

Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: March AB, a state-of-the-art march test for realistic static linked faults and dynamic faults in SRAMs. IET Computers & Digital Techniques 1(3): 237-245 (2007)

Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: A Novel Parity Bit Scheme for SBox in AES Circuits. DDECS 2007: 267-271

Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: An On-Line Fault Detection Scheme for SBoxes in Secure Circuits. IOLTS 2007: 57-62

Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale: Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. IOLTS 2007: 205-206

Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre: A Dependable Parallel Architecture for SBoxes. ReCoSoC 2007: 132-137

Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Automatic march tests generations for static linked faults in SRAMs. DATE 2006: 1258-1263

Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs. DDECS 2006: 157-158

Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Automatic March Tests Generation for Multi-Port SRAMs. DELTA 2006: 385-392

Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto: Single-Event Upset Analysis and Protection in High Speed Circuits. European Test Symposium 2006: 29-34

Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: A 22n March Test for Realistic Static Linked Faults in SRAMs. European Test Symposium 2006: 49-54

Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: March AB, March AB1: new March tests for unlinked dynamic memory faults. ITC 2005: 8

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Online Self-Repair of FIR Filters. IEEE Design & Test of Computers 20(3): 50-57 (2003)

Fabrizio Bertuccelli, Franco Bigongiari, Andrea S. Brogna, Giorgio Di Natale, Paolo Prinetto, Roberto Saletti: Exhaustive Test of Several Dependable Memory Architectures Designed by GRAAL Tool. Asian Test Symposium 2003: 32-37

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: A Watchdog Processor to Detect Data and Control Flow Errors. IOLTS 2003: 144-148

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, I. Solcia, Luca Tagliaferri: FAUST: FAUlt-injection Script-based Tool. IOLTS 2003: 160

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri: Data Critically Estimation In Software Applications. ITC 2003: 802-810

Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto: An on-line BIST RAM architecture with self-repair capabilities. IEEE Transactions on Reliability 51(1): 123-128 (2002)

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Specification and Design of a New Memory Fault Simulator. Asian Test Symposium 2002: 92-97

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: An Optimal Algorithm for the Automatic Generation of March Tests. DATE 2002: 938-943

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Static Analysis of SEU Effects on Software Applications. ITC 2002: 500-508

Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni: Online and Offline BIST in IP-Core Design. IEEE Design & Test of Computers 18(5): 92-99 (2001)

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: Memory Read Faults: Taxonomy and Automatic Test Generation. Asian Test Symposium 2001: 157-163

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri: Control-Flow Checking via Regular Expressions. Asian Test Symposium 2001: 299-303

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto: SEU effect analysis in an open-source router via a distributed fault injection environment. DATE 2001: 219-225

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Luca Tagliaferri, Paolo Prinetto: Validation of a Software Dependability Tool via Fault Injection Experiments. IOLTW 2001: 3-8

Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Franco Bigongiari: GRAAL: a tool for highly dependable SRAMs generation. ITC 2001: 250-257

Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni: A Family of Self-Repair SRAM Cores. IOLTW 2000: 214-218

Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni: A programmable BIST architecture for clusters of multiple-port SRAMs. ITC 2000: 557-566