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 | 2012 | |
|---|---|---|
| c31 |      | Mário P. Véstias, Horácio C. Neto: Parallel Decimal Multipliers and Squarers Using Karatsuba-Ofman's Algorithm. DSD 2012: 782-788 |
| c30 | | Mário P. Véstias, Horácio C. Neto, Helena Sarmento: Design of High-Speed Viterbi Decoders on Virtex-6 FPGAs. DSD 2012: 938-945 |
| c29 | | Mário P. Véstias, Horácio C. Neto, Helena Sarmento: Sliding block Viterbi decoders in FPGA. FPL 2012: 595-598 |
| c28 | | Victor Silva, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto: A High-Performance Reconfigurable Computing architecture using a magnetic configuration memory. ReConFig 2012: 1-6 |
| 2011 | ||
| c27 | | Mário P. Véstias, Horácio C. Neto: Revisiting the Newton-Raphson Iterative Method for Decimal Division. FPL 2011: 138-143 |
| 2010 | ||
| c26 | | Victor Silva, Jorge R. Fernandes, Horácio C. Neto: Reconfigurable Circuits Using Magnetic Tunneling Junction Memories. DoCEIS 2010: 549-558 |
| 2009 | ||
| c25 | | Victor Silva, Luís Bica Oliveira, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto: Run-Time Reconfigurable Array Using Magnetic RAM. DSD 2009: 74-81 |
| c24 | | Rui Duarte, Horácio C. Neto, Mário P. Véstias: Double-precision Gauss-Jordan Algorithm with Partial Pivoting on FPGAs. DSD 2009: 273-280 |
| c23 | | Rui Marcelino, Horácio C. Neto, João M. P. Cardoso: Unbalanced FIFO sorting for FPGA-based systems. ICECS 2009: 431-434 |
| 2008 | ||
| c22 | | Vítor Silva, Rui Duarte, Mário P. Véstias, Horácio C. Neto: Multiplier-based double precision floating point divider according to the IEEE-754 standard. ARC 2008: 260-265 |
| c21 | | Horácio C. Neto, Mário P. Véstias: Decimal multiplier on FPGA using embedded binary multipliers. FPL 2008: 197-202 |
| c20 | | Rui Marcelino, Horácio C. Neto, João M. P. Cardoso: Sorting Units for FPGA-Based Embedded Systems. DIPES 2008: 11-22 |
| 2007 | ||
| c19 | | Mário P. Véstias, Horácio C. Neto: Router Design for Application Specific Networks-on-Chip on Reconfigurable Systems. FPL 2007: 389-394 |
| 2006 | ||
| c18 | | Mário P. Véstias, Horácio C. Neto: Area/Performance Improvement of NoC Architectures. ARC 2006: 193-198 |
| c17 | | Mário P. Véstias, Horácio C. Neto: Co-synthesis of a configurable SoC platform based on a network on chip architecture. ASP-DAC 2006: 48-53 |
| c16 | | Goncalo M. de Matos, Horácio C. Neto: On Reconfigurable Architectures for Efficient Matrix Inversion. FPL 2006: 1-6 |
| c15 | | Mário P. Véstias, Horácio C. Neto: A Generic Network-on-Chip Architecture for Reconfigurable Systems: Implementation and Evaluation. FPL 2006: 1-4 |
| c14 | | Mário P. Véstias, Horácio C. Neto: Area and performance optimization of a generic network-on-chip architecture. SBCCI 2006: 68-73 |
| 2005 | ||
| c13 |  | Pedro Domingos, Fernando M. Silva, Horácio C. Neto: An Efficient and Scalable Architecture for Neural Networks with Backpropagation Learning. FPL 2005: 89-94 |
| c12 | | Ricardo S. Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto: Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping. SAMOS 2005: 41-50 |
| 2004 | ||
| c11 | | Ricardo S. Ferreira, João M. P. Cardoso, Horácio C. Neto: An Environment for Exploring Data-Driven Architectures. FPL 2004: 1022-1026 |
| 2003 | ||
| j3 | | João M. P. Cardoso, Horácio C. Neto: Compilation for FPGA-Based Reconfigurable Hardware. IEEE Design & Test of Computers 20(2): 65-75 (2003) |
| c10 | | Mário P. Véstias, Horácio C. Neto: DALI: A Methodology for the Co-Design of Dataflow Applications on Hardware/Software Architectures. SBCCI 2003: 85- |
| 2002 | ||
| c9 | | Mário P. Véstias, Horácio C. Neto: System-Level Co-Synthesis of Dataflow Dominated Applications on Reconfigurable Hardware/Software Architectures. IEEE International Workshop on Rapid System Prototyping 2002: 130-137 |
| 2001 | ||
| j2 | | Paulo F. Flores, Horácio C. Neto, João P. Marques Silva: An exact solution to the minimum size test pattern problem. ACM Trans. Design Autom. Electr. Syst. 6(4): 629-644 (2001) |
| c8 | | João M. P. Cardoso, Horácio C. Neto: Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines. FPL 2001: 523-533 |
| 1999 | ||
| c7 | | João M. P. Cardoso, Horácio C. Neto: Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System. FCCM 1999: 2-11 |
| c6 | | Paulo F. Flores, Horácio C. Neto, João P. Marques Silva: On Applying Set Covering Models to Test Set Compaction. Great Lakes Symposium on VLSI 1999: 8-11 |
| c5 | | João M. P. Cardoso, Horácio C. Neto: An Enhanced Static-List Scheduling Algorithm for Temporal Partitioning onto RPUs. VLSI 1999: 485-496 |
| c4 | | Paulo F. Flores, Horácio C. Neto, K. Chakrabarty, João P. Marques Silva: Test pattern generation for width compression in BIST. ISCAS (1) 1999: 114-118 |
| c3 | | Paulo F. Flores, José C. Costa, Horácio C. Neto, José C. Monteiro, João P. Marques Silva: Assignment and Reordering of Incompletely Specified Pattern Sequences Targetting Minimum Power Dissipation. VLSI Design 1999: 37-41 |
| 1998 | ||
| c2 | | Paulo F. Flores, Horácio C. Neto, João P. Marques Silva: An exact solution to the minimum size test pattern problem. ICCD 1998: 510-515 |
| 1994 | ||
| c1 | | José C. Monteiro, James H. Kukula, Srinivas Devadas, Horácio C. Neto: Bitwise Encoding of Finite State Machines. VLSI Design 1994: 379-382 |
| 1992 | ||
| j1 | | Luis Miguel Silveira, Jacob K. White, Horácio C. Neto, Luís M. Vidigal: On exponential fitting for circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(5): 566-574 (1992) |
| 1 | João M. P. Cardoso | |
| 2 | K. Chakrabarty | |
| 3 | José C. Costa | |
| 4 | Srinivas Devadas | |
| 5 | Pedro Domingos | |
| 6 | Rui Duarte | |
| 7 | Jorge R. Fernandes | |
| 8 | Ricardo S. Ferreira | |
| 9 | Paulo F. Flores | |
| 10 | James H. Kukula | |
| 11 | Rui Marcelino | |
| 12 | Goncalo M. de Matos | |
| 13 | José C. Monteiro (José Monteiro) | |
| 14 | Luís Bica Oliveira (Luís B. Oliveira) | |
| 15 | Helena Sarmento | |
| 16 | Fernando M. Silva | |
| 17 | João P. Marques Silva (João Marques-Silva) | |
| 18 | Victor Silva | |
| 19 | Vítor Silva | |
| 20 | Luis Miguel Silveira (L. Miguel Silveira) | |
| 21 | Andre Toledo | |
| 22 | Luís M. Vidigal | |
| 23 | Mário P. Véstias | |
| 24 | Jacob K. White (Jacob White) |
Colors in the list of coauthors
Last update Sat May 25 04:45:16 2013 CET by the DBLP Team —
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