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Gabriela Nicolescu
2010 – today
- 2013
[j20]Sébastien Le Beux, Ian O'Connor, Gabriela Nicolescu, Guy Bois, G. Pierre Paulin: Reduction methods for adapting optical network on chip topologies to 3D architectures. Microprocessors and Microsystems - Embedded Hardware Design 37(1): 87-98 (2013)
[c48]Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu: Explicit transient thermal simulation of liquid-cooled 3D ICs. DATE 2013: 1385-1390- 2012
[j19]Jelena Trajkovic, Samar Abdi, Gabriela Nicolescu, Daniel D. Gajski: Automated Generation of Custom Processor Core from C Code. J. Electrical and Computer Engineering 2012 (2012)
[j18]Youcef Bouchebaba, Ali Erdem Özcan, Pierre G. Paulin, Gabriela Nicolescu: MpAssign: a framework for solving the many-core platform mapping problem. Softw., Pract. Exper. 42(7): 891-915 (2012)
[j17]Bruno Girodias, Luiza Gheorghe Iugan, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin, Pierre G. Paulin: Integrating Memory Optimization with Mapping Algorithms for Multi-Processors System-on-Chip. ACM Trans. Embedded Comput. Syst. 11(3): 64 (2012)- 2011
[j16]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Junchen Liu, Maimouna Amadou, Gabriela Nicolescu: Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method. JETC 7(1): 3 (2011)
[c47]Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid: A linear-time approach for the transient thermal simulation of liquid-cooled 3d ics. CODES+ISSS 2011: 197-206
[c46]Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid, Ian O'Connor: Multi-granularity thermal evaluation of 3D MPSoC architectures. DATE 2011: 575-578
[c45]Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology. DATE 2011: 788-793
[c44]Giovanni Beltrame, Gabriela Nicolescu: A multi-objective decision-theoretic exploration algorithm for platform-based design. DATE 2011: 1192-1195
[c43]Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu: Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC). VLSI-SoC 2011: 242-247- 2010
[j15]Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: Multi-Optical Network-on-Chip for Large Scale MPSoC. Embedded Systems Letters 2(3): 77-80 (2010)
[j14]Sébastien Le Beux, Guy Bois, Gabriela Nicolescu, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin: Combining mapping and partitioning exploration for NoC-based embedded systems. Journal of Systems Architecture - Embedded Systems Design 56(7): 223-232 (2010)
[c42]Ahmed Azzabi, El Mostapha Aboulhamid, Gabriela Nicolescu: Timing verification of cyclic systems based on temporal constraint analysis. ICECS 2010: 659-662
[c41]Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: A system-level exploration flow for optica network on chip (ONoC) in 3D MPSoC. ISCAS 2010: 3613-3616
[c40]Youcef Bouchebaba, Pierre G. Paulin, Ali Erdem Özcan, Bruno Lavigueur, Michel Langevin, Olivier Benny, Gabriela Nicolescu: MpAssign: A framework for solving the many-core platform mapping problem. International Symposium on Rapid System Prototyping 2010: 1-7
[c39]Bruno Girodias, Luiza Gheorghe, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin, Pierre G. Paulin: Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip. International Symposium on Rapid System Prototyping 2010: 1-9
2000 – 2009
- 2009
[j13]Luiza Gheorghe Iugan, Gabriela Nicolescu, Ian O'Connor: Modeling and Formal Verification of a Passive Optical Network on Chip Behavior. ECEASST 21 (2009)
[j12]Gabriela Nicolescu, Didier Buchs: Rapid systems prototyping at RSP'06. Microelectronics Journal 40(7): 1081 (2009)
[j11]Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur: Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications. Signal Processing Systems 57(2): 263-283 (2009)
[c38]Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin: Optimizing Configuration and Application Mapping for MPSoC Architectures. AHS 2009: 474-481
[c37]Alain Fourmigue, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid: Co-simulation based platform for wireless protocols design explorations. DATE 2009: 874-877
[c36]Ahmed Amine Jerraya, Gabriela Nicolescu: Embedded tutorial - Understanding multicore technologies. DATE 2009: 1051
[c35]Victorino Sanz, Shafagh Jafer, Gabriel A. Wainer, Gabriela Nicolescu, Alfonso Urquia, Sebastián Dormido: Hybrid modeling of opto-electrical interfaces using DEVS and modelica. SpringSim 2009
[c34]Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu: Emerging Technologies and Nanoscale Computing Fabrics. VLSI-SoC 2009: 1-20- 2008
[c33]Simon Schliecker, Mircea Negrean, Gabriela Nicolescu, Pierre G. Paulin, Rolf Ernst: Reliable performance analysis of a multicore multithreaded system-on-chip. CODES+ISSS 2008: 161-166
[c32]Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb: Semantics for Model-Based Validation of Continuous/Discrete Systems. DATE 2008: 498-503- 2007
[j10]Faouzi Bouchhima, Gabriela Nicolescu, El Mostapha Aboulhamid, Mohamed Abid: Generic discrete-continuous simulation model for accurate validation in heterogeneous systems design. Microelectronics Journal 38(6-7): 805-815 (2007)
[j9]Youcef Bouchebaba, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid, Bruno Lavigueur, Pierre G. Paulin: MPSoC memory optimization using program transformation. ACM Trans. Design Autom. Electr. Syst. 12(4) (2007)
[j8]Youcef Bouchebaba, Bruno Girodias, Fabien Coelho, Gabriela Nicolescu, El Mostapha Aboulhamid: Buffer and Register Allocation for Memory Space Optimization. VLSI Signal Processing 49(1): 123-138 (2007)
[c31]Youcef Bouchebaba, Essaid Bensoudane, Bruno Lavigueur, Pierre G. Paulin, Gabriela Nicolescu: Two-level tiling for MPSoC architecture. ASAP 2007: 314-319
[c30]Matthieu Briere, Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, Fabien Mieyeville, Frédéric Gaffiot, Ian O'Connor: System level assessment of an optical NoC in an MPSoC platform. DATE 2007: 1084-1089
[c29]Youcef Bouchebaba, Bruno Lavigueur, Bruno Girodias, Gabriela Nicolescu, Pierre G. Paulin: MPSoC memory optimization for digital camera applications. DSD 2007: 424-427
[c28]Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb: A formalization of global simulation models for continuous/discrete systems. SCSC 2007: 559-566- 2006
[j7]James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu: A new efficient EDA tool design methodology. ACM Trans. Embedded Comput. Syst. 5(2): 408-430 (2006)
[j6]Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Damien Lyonnard, Olivier Benny, Bruno Lavigueur, David Lo, Giovanni Beltrame, V. Gagne, Gabriela Nicolescu: Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia. IEEE Trans. VLSI Syst. 14(7): 667-680 (2006)
[c27]Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Fabien Coelho: Buffer and register allocation for memory space optimization. ASAP 2006: 283-290
[c26]Nasreddine Hireche, J. M. Pierre Langlois, Gabriela Nicolescu: Survey of Biological High Performance Computing: Algorithms, Implementations and Outlook Research. CCECE 2006: 1926-1929
[c25]N. Ignat, B. Nicolescu, Yvon Savaria, Gabriela Nicolescu: Soft-error classification and impact analysis on real-time operating systems. DATE 2006: 182-187
[c24]Bruno Girodias, El Mostapha Aboulhamid, Gabriela Nicolescu: A Platform for Refinement of OS Services for Embedded Systems. DELTA 2006: 227-236
[c23]Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur: Application-Level Memory Optimization for MPSoC. IEEE International Workshop on Rapid System Prototyping 2006: 169-178
[c22]Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb: Formal Definitions of Simulation Interfaces in a Continuous/Discrete Co-Simulation Tool. IEEE International Workshop on Rapid System Prototyping 2006: 186-192
[c21]Simon Provost, Bruno Lavigueur, Guy Bois, Gabriela Nicolescu: Integration of Configurable Processors in a Multiprocessor Platform. SoCC 2006: 221-224- 2005
[c20]Robert Grou-Szabo, Hany Ghattas, Yvon Savaria, Gabriela Nicolescu: Component-Based Methodology for Hardware Design of a Dataflow Processing Network. IWSOC 2005: 289-294
[c19]Luiza Gheorghe, Gabriela Nicolescu: MP SoCs Including Optical Interconnect. Technological Progresses and Challenges for CAD Tools Design. IWSOC 2005: 546-551
[c18]James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu: Leveraging Model Representations for System Level Design Tools. IEEE International Workshop on Rapid System Prototyping 2005: 33-39
[c17]Faouzi Bouchhima, Gabriela Nicolescu, El Mostapha Aboulhamid, Mohamed Abid: Discrete-Continuous Simulation Model for Accurate Validation in Component-Based Heterogeneous SoC Design. IEEE International Workshop on Rapid System Prototyping 2005: 181-187- 2004
[j5]Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Ahmed Amine Jerraya: Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits. Journal of Systems and Software 70(3): 229-244 (2004)
[c16]Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Gabriela Nicolescu: Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management. CODES+ISSS 2004: 48-53
[c15]James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: .NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation. DATE 2004: 732-733
[c14]James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: ESys.Net: a new solution for embedded systems modeling and simulation. LCTES 2004: 107-114- 2002
[j4]Wander O. Cesário, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Lovic Gauthier, Mario Diaz-Nava: Multiprocessor SoC Platforms: A Component-Based Design Approach. IEEE Design & Test of Computers 19(6): 52-63 (2002)
[j3]Gabriela Nicolescu, Kjetil Svarstad, Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Sungjoo Yoo, Philippe Coste, Ahmed Amine Jerraya: Desiderata pour la spécification et la conception des systèmes électroniques. Technique et Science Informatiques 21(3): 291-314 (2002)
[c13]Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava: Component-based design approach for multicore SoCs. DAC 2002: 789-794
[c12]Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, Ahmed Amine Jerraya: Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. DATE 2002: 620-627
[c11]Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima, Gabriela Nicolescu: Validation in a Component-Based Design Flow for Multicore SoCs. ISSS 2002: 162-167
[c10]Gabriela Nicolescu, S. Martinez, Lobna Kriaa, Wassim Youssef, Sungjoo Yoo, Benoît Charlot, Ahmed Amine Jerraya: Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design. VLSI Design 2002: 426-- 2001
[j2]Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya: Colif: A Design Representation for Application-Specific Multiprocessor SOCs. IEEE Design & Test of Computers 18(5): 8-20 (2001)
[c9]Patrice Gerin, Sungjoo Yoo, Gabriela Nicolescu, Ahmed Amine Jerraya: Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. ASP-DAC 2001: 63-68
[c8]Kjetil Svarstad, Nezih Ben-Fredj, Gabriela Nicolescu, Ahmed Amine Jerraya: A higher level system communication model for object-oriented specification and design of embedded systems. ASP-DAC 2001: 69-77
[c7]Sungjoo Yoo, Gabriela Nicolescu, Damien Lyonnard, Amer Baghdadi, Ahmed Amine Jerraya: A generic wrapper architecture for multi-processor SoC cosimulation and design. CODES 2001: 195-200
[c6]Kjetil Svarstad, Gabriela Nicolescu, Ahmed Amine Jerraya: A model for describing communication between aggregate objects in the specification and design of embedded systems. DATE 2001: 77-85
[c5]Gabriela Nicolescu, Sungjoo Yoo, Ahmed Amine Jerraya: Mixed-level cosimulation for fine gradual refinement of communication in SoC design. DATE 2001: 754-759
[c4]Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, Ahmed Amine Jerraya: Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication. HLDVT 2001: 79-82
[c3]Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya: Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design. IEEE International Workshop on Rapid System Prototyping 2001: 110-115- 2000
[j1]Fabiano Hessel, Pascal Coste, Philippe Le Marrec, Nacer-Eddine Zergainoh, Gabriela Nicolescu, Jean-Marc Daveau, Ahmed Amine Jerraya: Interlanguage Communication Synthesis for Heterogeneous Specifications. Design Autom. for Emb. Sys. 5(3-4): 223-236 (2000)
[c2]Salvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz: Towards design and validation of mixed-technology SOCs. ACM Great Lakes Symposium on VLSI 2000: 29-33
[c1]Fabiano Hessel, Philippe Coste, Gabriela Nicolescu, P. LeMarrec, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Multi-Level Communication Synthesis of Heterogeneous Multilanguage Specification. ICCD 2000: 525-
Coauthor Index
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last updated on 2013-05-19 19:30 CEST by the dblp team



