- 2013
[c2]
Fumihiko Tachibana,
Osamu Hirabayashi,
Yasuhisa Takeyama,
Miyako Shizuno,
Atsushi Kawasumi,
Keiichi Kushida,
Azuma Suzuki,
Yusuke Niki,
Shinichi Sasaki,
Tomoaki Yabe,
Yasuo Unekawa:
A 27% active and 85% standby power reduction in dual-power-supply SRAM using BL power calculator and digitally controllable retention circuit. ISSCC 2013: 320-321
- 2011
[j1]
- 2010
[c1]
Yuki Fujimura,
Osamu Hirabayashi,
Takahiko Sasaki,
Azuma Suzuki,
Atsushi Kawasumi,
Yasuhisa Takeyama,
Keiichi Kushida,
Gou Fukano,
Akira Katayama,
Yusuke Niki,
Tomoaki Yabe:
A configurable SRAM with constant-negative-level write buffer for low-voltage operation with 0.149µm2 cell in 32nm high-k metal-gate CMOS. ISSCC 2010: 348-349
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