 | 2011 |
| j8 |  | |
| j7 |  | Osamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima: A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core. IEICE Transactions 94-C(4): 663-669 (2011) |
| 2010 |
| c3 |  | Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, S. Matsui, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima: A 45nm 37.3GOPS/W heterogeneous multi-core SoC. ISSCC 2010: 100-101 |
| 2009 |
| j6 |  | |
| 2006 |
| j5 |  | Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori: Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core. IEICE Transactions 89-C(3): 287-294 (2006) |
| j4 |  | |
| j3 |  | Fumio Arakawa, Tetsuya Yamada, Takashi Okada, Makoto Ishikawa, Yuki Kondo, Motokazu Ozawa, Tomoyuki Kodama, Osamu Nishii, Toshihiro Hattori, Tatsuya Kamei, Junichi Nishimoto, Shinichi Yoshioka: Development of processor cores for digital consumer appliances. Systems and Computers in Japan 37(3): 10-19 (2006) |
| 2005 |
| j2 |  | Makoto Ishikawa, Tatsuya Kamei, Yuki Kondo, Masanao Yamaoka, Yasuhisa Shimazaki, Motokazu Ozawa, Saneaki Tamaki, Mikio Furuyama, Tadashi Hoshi, Fumio Arakawa, Osamu Nishii, Kenji Hirose, Shinichi Yoshioka, Toshihiro Hattori: A 4500 MIPS/W, 86 µA Resume-Standby, 11 µA Ultra-Standby Application Processor for 3G Cellular Phones. IEICE Transactions 88-C(4): 528-535 (2005) |
| j1 |  | |
| c2 |  | Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori: Low-Power Design of 90-nm SuperH Processor Core. ICCD 2005: 258-266 |
| 1994 |
| c1 |  | Tetsuhiko Okada, Susumu Narita, Osamu Nishii, Noriharu Hiratsuka, Nobuyuki Hayashi, Mitsuo Asai, Shinji Fujiwara, Mikiko Satoh, Junichi Nishimoto, Hirokazu Aoki, Kunio Uchiyama, Shigeru Matsuo, Hidehito Takewa, Kouji Yamada, Masahiro Kainaga, Norio Nakagawa, Masanobu Yamagami, Hiroshi Takeda, Tsuneo Funabashi: A PA-RISC Mikroprocessor PA/50L For Low-Cost Systems. COMPCON 1994: 47-52 |