| 1986 | ||
|---|---|---|
| j3 | Ken-ichi Kobori, Noriyuki Futagami, Ikuo Nishioka: Automated generation of simply connected solid objects from wire-frame data using operations on graphs. The Visual Computer 2(6): 335-341 (1986) | |
| 1983 | ||
| j2 | Sieji Kimura, Noboru Kubo, Toru Chiba, Ikuo Nishioka: An Automatic Routing Scheme for General Cell LSI. IEEE Trans. on CAD of Integrated Circuits and Systems 2(4): 285-292 (1983) | |
| 1982 | ||
| c6 | Takashi Kambe, Toru Chiba, Seiji Kimura, Tsuneo Inufushi, Noboru Okuda, Ikuo Nishioka: A placement algorithm for polycell LSI and ITS evaluation. DAC 1982: 655-662 | |
| 1981 | ||
| c5 | Toru Chiba, Noboru Okuda, Takashi Kambe, Ikuo Nishioka, Tsuneo Inufushi, Sieji Kimura: SHARPS: A hierarchical layout system for VLSI. DAC 1981: 820-827 | |
| 1980 | ||
| j1 | Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Toru Chiba, Isao Shirakawa, Hiroshi Ozaki: An Approach to Gate Assignment and Module Placement for Printed Wiring Boards. IEEE Trans. Computers 29(8): 681-688 (1980) | |
| c4 | Ikuo Nishioka, Takuji Kurimoto, Hisao Nishida, Seiji Yamamoto, Toru Chiba, Toshiaki Nagakawa, Takatsugu Fujioka, Masashi Uchino: An automatic routing system for high density multilayer printed wiring boards. DAC 1980: 520-527 | |
| 1979 | ||
| c3 | Ken-ichi Sahara, Ken-ichi Kobori, Ikuo Nishioka: An interactive layout system of analog printed wiring boards. DAC 1979: 506-512 | |
| 1978 | ||
| c2 | Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Isao Shirakawa, Hiroshi Ozaki: An approach to gate assignment and module placement for printed wiring boards. DAC 1978: 60-69 | |
| 1977 | ||
| c1 | Ikuo Nishioka, Takuji Kurimoto, Hisao Nishida: A minicomputerized automatic layout system for two-layer printed wiring boards. DAC 1977: 1-11 | |
Colors in the list of coauthors
Last update Sun May 26 07:39:55 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page