DBLP: Wilhelmus A. M. Van Noije

	2012
j3		Wilmar Carvajal Ossa, Wilhelmus A. M. Van Noije: An Optimization-Based Reconfigurable Design for a 6-Bit 11-MHz Parallel Pipeline ADC with Double-Sampling S&H. Int. J. Reconfig. Comp. 2012 (2012)
c22		Hugo Daniel Hernández, Jonathan Scott, Wilhelmus A. M. Van Noije: DPA insensitive voltage regulator for contact smart cards. SBCCI 2012: 1-4
	2011
c21		M. M. Silva, J. W. Swart, Luiz Carlos Moreira, Wilhelmus A. M. Van Noije: Current-mode motion detector sensor using copier cell in CMOS technology. ICECS 2011: 480-483
c20		Wilmar Carvajal Ossa, Wilhelmus A. M. Van Noije: Time-interleaved pipeline ADC design: a reconfigurable approach supported by optimization. SBCCI 2011: 17-22
c19		Tiago Oliveira Weber, Wilhelmus A. M. Van Noije: Analog design synthesis method using simulated annealing and particle swarm optimization. SBCCI 2011: 85-90
	2010
c18		Jorge Johanny Sáenz Noval, Elkim Felipe Roa Fuentes, Armando Ayala Pabón, Wilhelmus A. M. Van Noije: A methodology to improve yield in analog circuits by using geometric programming. SBCCI 2010: 140-145
	2009
c17		Juan José Carrillo, Elkim Roa, José Vieira, Wilhelmus A. M. Van Noije: A low-voltage bandgap reference source based on the current-mode technique. SBCCI 2009
c16		Sergio Chaparro, Armando Ayala Pabón, Elkim Roa, Wilhelmus A. M. Van Noije: A merged RF CMOS LNA-Mixer design using geometric programming. SBCCI 2009
c15		Luiz Carlos Moreira, Wilhelmus A. M. Van Noije, Armando Ayala Pabón, Andrés Farfán-Peláez: Comparison of small cross inductors and rectangular inductors designed in 0.35um CMOS technology. SBCCI 2009
	2008
c14		Juan Mateus, Elkim Roa, Hugo Daniel Hernández, Wilhelmus A. M. Van Noije: A 2.7ua sub1-v voltage reference. SBCCI 2008: 81-84
c13		Jorge Oliveros, Dwight Cabrera, Elkim Roa, Wilhelmus A. M. Van Noije: An improved and automated design tool for the optimization of CMOS OTAs using geometric programming. SBCCI 2008: 146-151
	2007
c12		Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures. ISCAS 2007: 1895-1898
c11		Hugo Daniel Hernández, Wilhelmus A. M. Van Noije, Elkim Roa, João Navarro Jr.: A small area 8bits 50MHz CMOS DAC for bluetooth transmitter. SBCCI 2007: 10-15
c10		Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4.1 GHz prescaler using double data throughput E-TSPC structures. SBCCI 2007: 123-127
	2006
c9		A. J. Aragao, João Navarro Jr., Wilhelmus A. M. Van Noije: Mismatch effect analyses in CMOS tapered buffers. ISCAS 2006
c8		Luis H. C. Ferreira, Tales Cleber Pimenta, Robson L. Moreno, Wilhelmus A. M. Van Noije: Ultra low-voltage ultra low-power CMOS threshold voltage reference. SBCCI 2006: 80-82
	2005
c7		Angel M. Gómez Argüello, João Navarro Jr., Wilhelmus A. M. Van Noije: A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer. SBCCI 2005: 144-148
	2004
c6		Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4 GHz dual modulus divider-by 32/33 prescaler in 0.35m CMOS technology. SBCCI 2004: 94-99
	2003
c5		Elkim Roa, Joao Navarro Soares, Wilhelmus A. M. Van Noije: A Methodology for CMOS Low Noise Ampli.er Design. SBCCI 2003: 14-19
	2002
j2		João Navarro Jr., Wilhelmus A. M. Van Noije: Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design. IEEE Trans. VLSI Syst. 10(3): 301-308 (2002)
	2001
j1		Augusto Ken Morita, Marcio Toma, Wilhelmus A. M. Van Noije: Implementação de Um Sistema de Decriptografia para Controle Bancário em Hardware tipo FPGA. RITA 8(1): 63-81 (2001)
	2000
c4		Marco Antonio Dal Poz, J. Aedo Cobo, Wilhelmus A. M. Van Noije, Marcelo Knörich Zuffo: A Simple RISC Microprocessor Core Designed for Digital Set-Top-Box Applications. ASAP 2000: 35-
	1998
c3		João Navarro Jr., Wilhelmus A. M. Van Noije: CMOS Tapered Buffer Design for Small Width Clock/Data Signal Propagation. Great Lakes Symposium on VLSI 1998: 89-94
c2		João Navarro Jr., Wilhelmus A. M. Van Noije: Design of an 8: 1 MUX at 1.7Gbit/s in 0.8?I`m CMOS Technology. Great Lakes Symposium on VLSI 1998: 103-107
	1997
c1		João Navarro Jr., Reinaldo Silveira, Fábio L. Romao, Wilhelmus A. M. Van Noije: A 1.4 Gbit/s CMOS driver for 50 /spl Omega/ ECL systems. Great Lakes Symposium on VLSI 1997: 14-

2012

Wilmar Carvajal Ossa, Wilhelmus A. M. Van Noije: An Optimization-Based Reconfigurable Design for a 6-Bit 11-MHz Parallel Pipeline ADC with Double-Sampling S&H. Int. J. Reconfig. Comp. 2012 (2012)

c22

Hugo Daniel Hernández, Jonathan Scott, Wilhelmus A. M. Van Noije: DPA insensitive voltage regulator for contact smart cards. SBCCI 2012: 1-4

2011

c21

M. M. Silva, J. W. Swart, Luiz Carlos Moreira, Wilhelmus A. M. Van Noije: Current-mode motion detector sensor using copier cell in CMOS technology. ICECS 2011: 480-483

c20

Wilmar Carvajal Ossa, Wilhelmus A. M. Van Noije: Time-interleaved pipeline ADC design: a reconfigurable approach supported by optimization. SBCCI 2011: 17-22

c19

Tiago Oliveira Weber, Wilhelmus A. M. Van Noije: Analog design synthesis method using simulated annealing and particle swarm optimization. SBCCI 2011: 85-90

2010

c18

Jorge Johanny Sáenz Noval, Elkim Felipe Roa Fuentes, Armando Ayala Pabón, Wilhelmus A. M. Van Noije: A methodology to improve yield in analog circuits by using geometric programming. SBCCI 2010: 140-145

2009

c17

Juan José Carrillo, Elkim Roa, José Vieira, Wilhelmus A. M. Van Noije: A low-voltage bandgap reference source based on the current-mode technique. SBCCI 2009

c16

Sergio Chaparro, Armando Ayala Pabón, Elkim Roa, Wilhelmus A. M. Van Noije: A merged RF CMOS LNA-Mixer design using geometric programming. SBCCI 2009

c15

Luiz Carlos Moreira, Wilhelmus A. M. Van Noije, Armando Ayala Pabón, Andrés Farfán-Peláez: Comparison of small cross inductors and rectangular inductors designed in 0.35um CMOS technology. SBCCI 2009

2008

c14

Juan Mateus, Elkim Roa, Hugo Daniel Hernández, Wilhelmus A. M. Van Noije: A 2.7ua sub1-v voltage reference. SBCCI 2008: 81-84

c13

Jorge Oliveros, Dwight Cabrera, Elkim Roa, Wilhelmus A. M. Van Noije: An improved and automated design tool for the optimization of CMOS OTAs using geometric programming. SBCCI 2008: 146-151

2007

c12

Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures. ISCAS 2007: 1895-1898

c11

Hugo Daniel Hernández, Wilhelmus A. M. Van Noije, Elkim Roa, João Navarro Jr.: A small area 8bits 50MHz CMOS DAC for bluetooth transmitter. SBCCI 2007: 10-15

c10

Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4.1 GHz prescaler using double data throughput E-TSPC structures. SBCCI 2007: 123-127

2006

A. J. Aragao, João Navarro Jr., Wilhelmus A. M. Van Noije: Mismatch effect analyses in CMOS tapered buffers. ISCAS 2006

Luis H. C. Ferreira, Tales Cleber Pimenta, Robson L. Moreno, Wilhelmus A. M. Van Noije: Ultra low-voltage ultra low-power CMOS threshold voltage reference. SBCCI 2006: 80-82

2005

Angel M. Gómez Argüello, João Navarro Jr., Wilhelmus A. M. Van Noije: A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer. SBCCI 2005: 144-148

2004

Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4 GHz dual modulus divider-by 32/33 prescaler in 0.35m CMOS technology. SBCCI 2004: 94-99

2003

Elkim Roa, Joao Navarro Soares, Wilhelmus A. M. Van Noije: A Methodology for CMOS Low Noise Ampli.er Design. SBCCI 2003: 14-19

2002

João Navarro Jr., Wilhelmus A. M. Van Noije: Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design. IEEE Trans. VLSI Syst. 10(3): 301-308 (2002)

2001

Augusto Ken Morita, Marcio Toma, Wilhelmus A. M. Van Noije: Implementação de Um Sistema de Decriptografia para Controle Bancário em Hardware tipo FPGA. RITA 8(1): 63-81 (2001)

2000

Marco Antonio Dal Poz, J. Aedo Cobo, Wilhelmus A. M. Van Noije, Marcelo Knörich Zuffo: A Simple RISC Microprocessor Core Designed for Digital Set-Top-Box Applications. ASAP 2000: 35-

1998

João Navarro Jr., Wilhelmus A. M. Van Noije: CMOS Tapered Buffer Design for Small Width Clock/Data Signal Propagation. Great Lakes Symposium on VLSI 1998: 89-94

João Navarro Jr., Wilhelmus A. M. Van Noije: Design of an 8: 1 MUX at 1.7Gbit/s in 0.8?I`m CMOS Technology. Great Lakes Symposium on VLSI 1998: 103-107

1997

João Navarro Jr., Reinaldo Silveira, Fábio L. Romao, Wilhelmus A. M. Van Noije: A 1.4 Gbit/s CMOS driver for 50 /spl Omega/ ECL systems. Great Lakes Symposium on VLSI 1997: 14-

1	A. J. Aragao	[c9]
2	Angel M. Gómez Argüello	[c7]
3	Dwight Cabrera	[c13]
4	Juan José Carrillo	[c17]
5	Sergio Chaparro	[c16]
6	J. Aedo Cobo	[c4]
7	Andrés Farfán-Peláez	[c15]
8	Luis H. C. Ferreira	[c8]
9	Hugo Daniel Hernández	[c22] [c14] [c11]
10	Juan Mateus	[c14]
11	Fernando P. H. de Miranda	[c12] [c10] [c6]
12	Luiz Carlos Moreira	[c21] [c15]
13	Robson L. Moreno	[c8]
14	Augusto Ken Morita	[j1]
15	João Navarro Jr. (Joao Navarro Soares)	[c12] [c11] [c10] [c9] [c7] [c6] [c5] [j2] [c3] [c2] [c1]
16	Jorge Johanny Sáenz Noval	[c18]
17	Jorge Oliveros	[c13]
18	Wilmar Carvajal Ossa	[j3] [c20]
19	Armando Ayala Pabón	[c18] [c16] [c15]
20	Tales Cleber Pimenta	[c8]
21	Marco Antonio Dal Poz	[c4]
22	Elkim Roa (Elkim Felipe Roa Fuentes)	[c18] [c17] [c16] [c14] [c13] [c11] [c5]
23	Fábio L. Romao	[c1]
24	Jonathan Scott	[c22]
25	M. M. Silva	[c21]
26	Reinaldo Silveira	[c1]
27	J. W. Swart	[c21]
28	Marcio Toma	[j1]
29	José Vieira	[c17]
30	Tiago Oliveira Weber	[c19]
31	Marcelo Knörich Zuffo	[c4]

Wilhelmus A. M. Van Noije

Coauthor Index