Tobias G. Noll

Arne Heittmann, Tobias G. Noll: Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulation. ASP-DAC 2013: 503-508

Xiaolin Chen, Shuai Li, Jochen Schleifer, Thomas Coenen, Anupam Chattopadhyay, Gerd Ascheid, Tobias G. Noll: High-level modeling and synthesis for embedded FPGAs. DATE 2013: 1565-1570

Arne Heittmann, Tobias G. Noll: Limits of writing multivalued resistances in passive nanoelectronic crossbars used in neuromorphic circuits. ACM Great Lakes Symposium on VLSI 2012: 227-232

Tobias Gemmeke, Maryam Ashouei, Tobias G. Noll: Noise Margin Based Library Optimization Considering Variability in Sub-threshold. PATMOS 2012: 72-82

Matthias Korb, Tobias G. Noll: A quantitative analysis of fixed-point LDPC-decoder implementations using hardware-accelerated HDL emulations. ICSAMOS 2012: 294-301

Yuan Ren, Michael Gansen, Tobias G. Noll: Low power 6T-SRAM with tree address decoder using a new equalizer precharge scheme. SoCC 2012: 224-229

Upasna Vishnoi, Michael Meixner, Tobias G. Noll: An approach for quantitative optimization of highly efficient dedicated CORDIC macros as SoC building blocks. SoCC 2012: 242-247

Jochen Schleifer, Thomas Coenen, Tobias G. Noll: Statistical modeling of reliability in logic devices. Microelectronics Reliability 51(9-11): 1469-1473 (2011)

Matthias Korb, Tobias G. Noll: Area- and energy-efficient high-throughput LDPC decoders with low block latency. ESSCIRC 2011: 75-78

Arne Heittmann, Tobias G. Noll: Sensitivity of neuromorphic circuits using nanoelectronic resistive switches to pulse synchronization. ACM Great Lakes Symposium on VLSI 2011: 375-378

Alexander Behrens, Linus Atorf, Robert Schwann, Bernd Neumann, Rainer Schnitzler, Johannes Ballé, Thomas Herold, Aulis Telle, Tobias G. Noll, Kay Hameyer, Til Aach: MATLAB Meets LEGO Mindstorms - A Freshman Introduction Course Into Practical Engineering. IEEE Trans. Education 53(2): 306-317 (2010)

Götz Kappen, Lothor Kurz, O. Priebe, Tobias G. Noll: Design Space Exploration for an ASIP/Co-Processor Architecture used in GNSS Receivers. Signal Processing Systems 58(1): 41-51 (2010)

Tobias G. Noll, Thorsten von Sydow, Bernd Neumann, Jochen Schleifer, Thomas Coenen, Götz Kappen: Reconfigurable Components for Application-Specific Processor Architectures. Dynamically Reconfigurable Systems 2010: 25-49

E. Tasdemir, Götz Kappen, Tobias G. Noll: Potential of using block floating point arithmetic in ASIP-based GNSS-receivers. ASAP 2010: 293-296

Ingo Rust, Tobias G. Noll: A radix-4 single-precision floating point divider based on digit set interleaving. ISCAS 2010: 709-712

Holger Blume, Jörg von Livonius, Lisa Rotenberg, Tobias G. Noll, Harald Bothe, Jörg Brakensiek: OpenMP-based parallelization on an MPCore multiprocessor platform - A performance and power analysis. Journal of Systems Architecture - Embedded Systems Design 54(11): 1019-1029 (2008)

Kieran McLaughlin, Sakir Sezer, Holger Blume, Xin Yang, Friederich Kupzog, Tobias G. Noll: A Scalable Packet Sorting Circuit for High-Speed WFQ Packet Scheduling. IEEE Trans. VLSI Syst. 16(7): 781-791 (2008)

Bernd Neumann, Thorsten von Sydow, Holger Blume, Tobias G. Noll: Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs. Signal Processing Systems 53(1-2): 129-143 (2008)

Bernd Neumann, Thorsten von Sydow, Holger Blume, Tobias G. Noll: Design flow for embedded FPGAs based on a flexible architecture template. DATE 2008: 56-61

Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Götz Kappen, Tobias G. Noll: Application-specific reconfigurable processors. FPL 2008: 350

Jörg von Livonius, Holger Blume, Tobias G. Noll: Design of a Pareto-optimization environment and its application to motion estimation. MMSP 2008: 838-843

Thorsten von Sydow, Holger Blume, Götz Kappen, Tobias G. Noll: ASIP-eFPGA Architecture for Multioperable GNSS Receivers. SAMOS 2008: 136-145

Holger Blume, Thorsten von Sydow, Daniel Becker, Tobias G. Noll: Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures. Journal of Systems Architecture 53(8): 466-476 (2007)

Holger Blume, Daniel Becker, Lisa Rotenberg, Martin Botteck, Jörg Brakensiek, Tobias G. Noll: Hybrid functional- and instruction-level power modeling for embedded and heterogeneous processor architectures. Journal of Systems Architecture 53(10): 689-702 (2007)

Götz Kappen, S. el Bahri, O. Priebe, Tobias G. Noll: Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers. ASAP 2007: 296-301

Peter Zipf, Heiko Hinkelmann, Lei Deng, Manfred Glesner, Holger Blume, Tobias G. Noll: A Power Estimation Model for an FPGA-based Softcore Processor. FPL 2007: 171-176

Martin Botteck, Holger Blume, Jörg von Livonius, Martin Neuenhahn, Tobias G. Noll: Programmable Architectures for Realtime Music Decompression. PARCO 2007: 777-784

Holger Blume, Jörg von Livonius, Lisa Rotenberg, Tobias G. Noll, Harald Bothe, Jörg Brakensiek: Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform. ICSAMOS 2007: 74-81

Holger Blume, Thorsten von Sydow, Tobias G. Noll: A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication Domain. VLSI Signal Processing 43(2-3): 223-233 (2006)

Friederich Kupzog, Holger Blume, Tobias G. Noll, Kieran McLaughlin, Sakir Sezer, John V. McCanny: Design and Analysis of Matching Circuit Architectures for a Closest Match Lookup. AICT/ICIW 2006: 56

Thorsten von Sydow, Bernd Neumann, Holger Blume, Tobias G. Noll: Quantitative Analysis of Embedded FPGA-Architectures for Arithmetic. ASAP 2006: 125-131

Götz Kappen, Tobias G. Noll: Application specific instruction processor based implementation of a GNSS receiver on an FPGA. DATE Designers' Forum 2006: 58-63

Tobias G. Noll, Uwe Lambrette: Cross disciplinary aspects (4G wireless special day). DATE 2006: 726

Kieran McLaughlin, Friederich Kupzog, Holger Blume, Sakir Sezer, Tobias G. Noll, John V. McCanny: Design and analysis of matching circuit architectures for a closest match lookup. IPDPS 2006

Thorsten von Sydow, Matthias Korb, Bernd Neumann, Holger Blume, Tobias G. Noll: Modelling and Quantitative Analysis of Coupling Mechanisms of Programmable Processor Cores and Arithmetic Oriented eFPGA Macros. ReConFig 2006: 252-261

Holger Blume, Daniel Becker, Martin Botteck, Jörg Brakensiek, Tobias G. Noll: Hybrid Functional and Instruction Level Power Modeling for Embedded Processors. SAMOS 2006: 216-226

Kieran McLaughlin, Sakir Sezer, Holger Blume, Xin Yang, Friederich Kupzog, Tobias G. Noll: A Scalable Packet Sorting Circuit for High-Speed WFQ Packet Scheduling. SoCC 2006: 271-274

Holger Blume, H. T. Feldkämper, Tobias G. Noll: Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip. VLSI Signal Processing 40(1): 19-34 (2005)

José L. Rodríguez-Navarro, Michael Gansen, Tobias G. Noll: Error-tolerant FIR filters based on low-cost residue codes. ISCAS (5) 2005: 5210-5213

Holger Blume, Thorsten von Sydow, Daniel Becker, Tobias G. Noll: Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets. SAMOS 2005: 374-383

Tobias Gemmeke, Tobias G. Noll: A Physically Oriented Model to Quantify the Noise-on-Delay Effect. PATMOS 2004: 879-888

Holger Blume, Thorsten von Sydow, Tobias G. Noll: Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets. SAMOS 2004: 484-493

Holger Blume, Hans-Martin Blüthgen, Christiane Henning, Patrick Osterloh, Tobias G. Noll: Embedding of Dedicated High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia Functionality. VLSI Signal Processing 31(2): 117-126 (2002)

Holger Blume, H. Hübert, H. T. Feldkämper, Tobias G. Noll: Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip. ASAP 2002: 29-40

V. S. Gierenz, Oliver Weiss, Tobias G. Noll, I. Carew, Jonathan J. Ashley, Razmik Karabed: A 550 Mb/s Radix-4 Bit-level Pipelined 16-State 0.25-mu m CMOS Viterbi Decoder. ASAP 2000: 195-

Hans-Martin Blüthgen, Tobias G. Noll: A Programmable Processor for Approximate String Matching with High Throughput Rate. ASAP 2000: 309-

Hans-Martin Blüthgen, Patrick Osterloh, Holger Blume, Tobias G. Noll: A Hardware Implementation for Approximate Text Search in Multimedia Applications. IEEE International Conference on Multimedia and Expo (III) 2000: 1425-1428

Arndt Glowinski, J. Küsch, Gerhard Adam, Arno Bücker, Tobias G. Noll, Rolf W. Günther: Device visualization for interventional MRI using local magnetic fields: Basic theory and its application to catheter visualization. IEEE Trans. Med. Imaging 17(5): 794-802 (1998)

Jan Peter Berns, Tobias G. Noll: A Flexible 200 GOPS HDTV Motion Estimation Chip. VLSI Signal Processing 19(2): 85-95 (1998)

K. Eck, Andreas R. Brenner, W. Wilhelm, Tobias G. Noll: Verbesserung der Dynamik und Ortsauflösung in der Ultraschalldiagnostik durch die Kombination kodierter Anregung und tiefenangepaßter Mismatched-Filterung. Bildverarbeitung für die Medizin 1998

Robert Schwann, K. Eck, Andreas R. Brenner, Tobias G. Noll: Tiefenangepaßte Filterung für das Puls-Echo-Verfahren in der Ultraschalldiagnostik. Bildverarbeitung für die Medizin 1998

Michael Gansen, Frank Richter, Oliver Weiss, Tobias G. Noll: A Datapath Generator for Full-Custom Macros of Iterative Logic Arrays. ASAP 1997: 438-447

Jan Peter Berns, Tobias G. Noll: A Flexible Motion Estimation Chip for Variable Size Block Matching. ASAP 1996: 112-121

K. Eck, Andreas R. Brenner, Tobias G. Noll: Korrektur der Phasenaberration in Ultraschallaufnahmen durch das Dynamic-Time-Warping Verfahren. Bildverarbeitung für die Medizin 1996

S. Kannengießer, Andreas R. Brenner, Tobias G. Noll: Artefaktreduzierung in der ultraschnellen Magnetresonanz-Bildgebung mittels inverser Filterung im Ortsfrequenzbereich. Bildverarbeitung für die Medizin 1996

Matthias Schöbinger, Tobias G. Noll: Low Power CMOS Design Strategies. DAC 1994: 594-595

Erik De Man, Matthias Schöbinger, Tobias G. Noll, Georg Sebald: A 60-MBaud Single-Chip QAM-Processor for the Complete Base-Band Signal Processing of QAM Demodulators. ISCAS 1994: 275-278

Tobias G. Noll: Carry-save architectures for high-speed digital signal processing. VLSI Signal Processing 3(1-2): 121-140 (1991)