 | 2011 |
| j2 |  | |
| c2 |  | Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato: An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs. ISSCC 2011: 266-268 |
| 2010 |
| j1 |  | Makoto Saen, Kenichi Osada, Yasuyuki Okuma, Kiichi Niitsu, Yasuhisa Shimazaki, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Itaru Nonomura, Naohiko Irie, Toshihiro Hattori, Atsushi Hasegawa, Tadahiro Kuroda: 3-D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link. J. Solid-State Circuits 45(4): 856-862 (2010) |
| 2009 |
| c1 |  | Kiichi Niitsu, Yasuhisa Shimazaki, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Itaru Nonomura, Makoto Saen, Shigenobu Komatsu, Kenichi Osada, Naohiko Irie, Toshihiro Hattori, Atsushi Hasegawa, Tadahiro Kuroda: An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM. ISSCC 2009: 480-481 |