Daniel Nussbaum

Mark Moir, Daniel Nussbaum: What Kinds of Applications Can Benefit from Transactional Memory? ISCA Workshops 2010: 150-160

David Dice, Yossi Lev, Virendra J. Marathe, Mark Moir, Daniel Nussbaum, Marek Olszewski: Simplifying concurrent algorithms by exploiting hardware transactional memory. SPAA 2010: 325-334

David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum: Early experience with a commercial hardware transactional memory implementation. ASPLOS 2009: 157-168

Mark Moir, Kevin Moore, Daniel Nussbaum: The adaptive transactional memory test platform: a tool for experimenting with transactional code for rock (poster). SPAA 2008: 362

Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum: Hybrid transactional memory. ASPLOS 2006: 336-346

Victor Luchangco, Daniel Nussbaum, Nir Shavit: A Hierarchical CLH Queue Lock. Euro-Par 2006: 801-810

Mark Moir, Daniel Nussbaum, Ori Shalev, Nir Shavit: Using elimination to implement scalable and lock-free FIFO queues. SPAA 2005: 253-262

Alexandra Fedorova, Margo I. Seltzer, Christopher Small, Daniel Nussbaum: Performance of Multithreaded Chip Multiprocessors and Implications for Operating System Design. USENIX Annual Technical Conference, General Track 2005: 395-398

Alexandra Fedorova, Christopher Small, Daniel Nussbaum, Margo I. Seltzer: Chip multithreading systems need a new operating system scheduler. ACM SIGOPS European Workshop 2004: 9

Anant Agarwal, Jonathan Babb, David Chaiken, Godfrey D'Souza, Kirk L. Johnson, David A. Kranz, John Kubiatowicz, Beng-Hong Lim, Gino Maa, Kenneth Mackenzie, Daniel Nussbaum, Mike Parkin, Donald Yeung: Sparcle: A Multithreaded VLSI Processor for Parallel Computing. Parallel Symbolic Computing 1992: 359-361

Daniel Nussbaum, Anant Agarwal: Scalability of Parallel Machines. Commun. ACM 34(3): 57-61 (1991)

Daniel Nussbaum, Ingmar Vuong-Adlerberg, Anant Agarwal: Modeling a Circuit Switched Multiprocessor Interconnect. SIGMETRICS 1990: 267-269