Ian O'Connor

Sébastien Le Beux, Ian O'Connor, Gabriela Nicolescu, Guy Bois, G. Pierre Paulin: Reduction methods for adapting optical network on chip topologies to 3D architectures. Microprocessors and Microsystems - Embedded Hardware Design 37(1): 87-98 (2013)

Zhen Li, Sébastien Le Beux, Christelle Monat, Xavier Letartre, Ian O'Connor: Optical look up table. DATE 2013: 873-876

Felipe Frantz, Lioula Labrak, Ian O'Connor: 3D IC floorplanning: Automating optimization settings and exploring new thermal-aware management techniques. Microelectronics Journal 43(6): 423-432 (2012)

Hubert Filiol, Ian O'Connor, Dominique Morche: Analog IC Variability Bound Estimation Using the Cornish-Fisher Expansion. IEEE Trans. on CAD of Integrated Circuits and Systems 31(9): 1457-1461 (2012)

Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux: Ambipolar double-gate FETs for the design of compact logic structures. ACM Great Lakes Symposium on VLSI 2012: 3-8

Wan Du, Fabien Mieyeville, David Navarro, Ian O'Connor: IDEA1: A validated SystemC-based system-level design and simulation environment for wireless sensor networks. EURASIP J. Wireless Comm. and Networking 2011: 143 (2011)

Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Junchen Liu, Maimouna Amadou, Gabriela Nicolescu: Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method. JETC 7(1): 3 (2011)

Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Paul-Henry Morel, Jean-Philippe Noël, Fabien Clermidy, Ian O'Connor: Can we go towards true 3-D architectures? DAC 2011: 282-283

Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid, Ian O'Connor: Multi-granularity thermal evaluation of 3D MPSoC architectures. DATE 2011: 575-578

Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology. DATE 2011: 788-793

Kotb Jabeur, Nataliya Yakymets, Ian O'Connor, Sébastien Le Beux: Fine-grain reconfigurable logic cells based on double-gate CNTFETs. ACM Great Lakes Symposium on VLSI 2011: 19-24

Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux: High performance 4: 1 multiplexer with ambipolar double-gate FETs. ICECS 2011: 677-680

Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy, Ian O'Connor: Evaluation of a crossbar multiplexer in a lithography-based nanowire technology. ISCAS 2011: 2930-2933

Wan Du, David Navarro, Fabien Mieyeville, Ian O'Connor: IDEA1: A Validated System C-Based Simulator for Wireless Sensor Networks. MASS 2011: 825-830

Hui Zhu, Sébastien Le Beux, Nataliya Yakymets, Ian O'Connor: Using Self-Reconfiguration to Increase Manufacturing Yield of CNTFET-based Architectures. ReConFig 2011: 111-116

Nataliya Yakymets, Sébastien Le Beux, Kotb Jabeur, Ian O'Connor: Multi-objective mapping for matrix-based nanocomputer architectures. ReCoSoC 2011: 1-7

Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu: Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC). VLSI-SoC 2011: 242-247

Felipe Frantz, Lioula Labrak, Ian O'Connor: 3D-IC floorplanning: Applying meta-optimization to improve performance. VLSI-SoC 2011: 404-409

Mihai Galos, Fabien Mieyeville, David Navarro, Ian O'Connor: Reprogramming hardware-software heterogeneous Wireless Sensor Networks. WPMC 2011: 1-5

Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: Multi-Optical Network-on-Chip for Large Scale MPSoC. Embedded Systems Letters 2(3): 77-80 (2010)

Ilham Hassoune, Denis Flandre, Ian O'Connor, Jean-Didier Legat: ULPFA: A New Efficient Design of a Power-Aware Full Adder. IEEE Trans. on Circuits and Systems 57-I(8): 2066-2074 (2010)

Bo Wang, Ian O'Connor, Emmanuel Drouard, Lioula Labrak: Bottom-up Verification Methodology for CMOS Photonic Linear Heterogeneous System. FDL 2010: 149-154

Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Marina Reyboz, Giovanni Beneventi, Fabien Clermidy, Luca Perniola, Ian O'Connor: Phase-change-memory-based storage elements for configurable logic. FPT 2010: 17-20

Ian O'Connor, Kotb Jabeur, David Navarro, Nataliya Yakymets, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy: Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics. ICECS 2010: 66-69

Atef Allam, Ian O'Connor, Alberto Scandurra: Optical network-on-chip reconfigurable model for multi-level analysis. ISCAS 2010: 3609-3612

Atef Allam, Ian O'Connor, W. Heirman: Performance evaluation for passive-type Optical network-on-chip. International Symposium on Rapid System Prototyping 2010: 1-7

Luiza Gheorghe Iugan, Gabriela Nicolescu, Ian O'Connor: Modeling and Formal Verification of a Passive Optical Network on Chip Behavior. ECEASST 21 (2009)

Atef Allam, Ian O'Connor, Emmanuel Drouard, Fabien Mieyeville, Alberto Scandurra: Optical NoC design-parameters exploration and analysis. ICECS 2009: 435-438

Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Renaud Daviot: Reconfigurable nanoscale logic cells : a comparison study. ICECS 2009: 483-486

Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Junchen Liu, Renaud Daviot: Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme. ICECS 2009: 888-891

Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu: Emerging Technologies and Nanoscale Computing Fabrics. VLSI-SoC 2009: 1-20

Ian O'Connor, Faress Tissafi-Drissi, Frédéric Gaffiot, Joni Dambre, Michiel De Wilde, Jan Van Campenhout, D. Van Thourhout, Dirk Stroobandt: Systematic Simulation-Based Predictive Synthesis of Integrated Optical Interconnect. IEEE Trans. VLSI Syst. 15(8): 927-940 (2007)

J. Liu, Ian O'Connor, David Navarro, Frédéric Gaffiot: Novel CNTFET-based Reconfigurable Logic Gate Design. DAC 2007: 276-277

Matthieu Briere, Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, Fabien Mieyeville, Frédéric Gaffiot, Ian O'Connor: System level assessment of an optical NoC in an MPSoC platform. DATE 2007: 1084-1089

J. Liu, Ian O'Connor, David Navarro, Frédéric Gaffiot: Design of a Novel CNTFET-based Reconfigurable Logic Gate. ISVLSI 2007: 285-290

J. Liu, Ian O'Connor, David Navarro, Frédéric Gaffiot: A Family of Ultra-Fine Grain CNTFET-based Reconfigurable Logic Gates. ReCoSoC 2007: 177-185

Ian O'Connor, Faress Tissafi-Drissi, G. Revy, Frédéric Gaffiot: UML/XML based approach to hierarchical AMS Synthesis. FDL 2005: 89-101

David Navarro, D. Ramat, Fabien Mieyeville, Ian O'Connor, Frédéric Gaffiot, Laurent Carrel: VHDL & VHDL-AMS Modelling and Simulation of a CMOS Imager IP. FDL 2005: 179-183

Ian O'Connor, Matthieu Briere, Emmanuel Drouard, Art Kazmierczak, Faress Tissafi-Drissi, David Navarro, Fabien Mieyeville, Joni Dambre, Dirk Stroobandt, Jean-Marc Fedeli, Zbigniew Lisik, Frédéric Gaffiot: Towards reconfigurable optical networks on chip. ReCoSoC 2005: 121-128

Matthieu Briere, Emmanuel Drouard, Fabien Mieyeville, David Navarro, Ian O'Connor, Frédéric Gaffiot: Heterogeneous Modelling of an Optical Network-on-Chip with SystemC. IEEE International Workshop on Rapid System Prototyping 2005: 10-16

Faress Tissafi-Drissi, Ian O'Connor, Frédéric Gaffiot: RUNE: Platform for Automated Design of Integrated Multi-Domain Systems. Application to High-Speed CMOS Photoreceiver Front-Ends. DATE 2004: 16-21

Christian Piguet, Jacques Gautier, Christoph Heer, Ian O'Connor, Ulf Schlichtmann: Extremely Low-Power Logic. DATE 2004: 656-663

Matthieu Briere, Laurent Carrel, T. Michalke, Fabien Mieyeville, Ian O'Connor, Frédéric Gaffiot: Design and Behavioral Modeling Tools for Optical Network-on-Chip. DATE 2004: 738-739

Emmanuel Drouard, Matthieu Briere, Fabien Mieyeville, Ian O'Connor, Xavier Letartre: Optical Network On-chip Multi-Domain modeling using SystemC. FDL 2004: 123-135

Grzegorz Tosik, Zbigniew Lisik, Malgorzata Langer, Frédéric Gaffiot, Ian O'Connor: Simulation of Electrical and Optical Interconnections for Future VLSI ICs. International Conference on Computational Science 2004: 1037-1044

Ian O'Connor: Optical solutions for system-level interconnect. SLIP 2004: 79-88

Fabien Mieyeville, Matthieu Briere, Ian O'Connor, Frédéric Gaffiot, Gilles Jacquemod: A VHDL-AMS library of hierarchical optoelectronic device models. FDL 2003: 7-19

Faress Tissafi-Drissi, Ian O'Connor, F. Mieyeveville, Frédéric Gaffiot: Hierarchical synthesis of high-speed CMOS photoreceiver front-ends using a multi-domain behavioural description language. FDL 2003: 151-163

Grzegorz Tosik, Frédéric Gaffiot, Zbigniew Lisik, Ian O'Connor, Faress Tissafi-Drissi: Optical versus Electrical Interconnections for Clock Distribution Networks in New VLSI Technologies. PATMOS 2003: 461-470

Faress Tissafi-Drissi, Ian O'Connor, Fabien Mieyeville, Frédéric Gaffiot: Design Methodologies for High-Speed CMOS Photoreceiver Front-Ends. SBCCI 2003: 323-328

Ian O'Connor, Andreas Kaiser: Automated synthesis of current-memory cells. IEEE Trans. on CAD of Integrated Circuits and Systems 19(4): 413-424 (2000)

Pascal Bontoux, Fabien Mieyeville, Ian O'Connor, Frédéric Gaffiot, Gilles Jacquemod: Design and Optimization of Optical Links Based on VHDL-AMS Modeling. BMAS 2000: 62-67