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 | 2013 | |
|---|---|---|
| j38 |      | Igors Homjakovs, Masanori Hashimoto, Tetsuya Hirose, Takao Onoye: Signal-Dependent Analog-to-Digital Conversion Based on MINIMAX Sampling. IEICE Transactions 96-A(2): 459-468 (2013) |
| j37 | | Takehiko Amaki, Masanori Hashimoto, Takao Onoye: Jitter Amplifier for Oscillator-Based True Random Number Generator. IEICE Transactions 96-A(3): 684-696 (2013) |
| j36 | | Yasuhiro Ogasahara, Masanori Hashimoto, Toshiki Kanamoto, Takao Onoye: Supply Noise Suppression by Triple-Well Structure. IEEE Trans. VLSI Syst. 21(4): 781-785 (2013) |
| 2012 | ||
| j35 | | Yasumichi Takai, Masanori Hashimoto, Takao Onoye: Power Gating Implementation for Supply Noise Mitigation with Body-Tied Triple-Well Structure. IEICE Transactions 95-A(12): 2220-2225 (2012) |
| j34 | | Shuta Kimura, Masanori Hashimoto, Takao Onoye: A Body Bias Clustering Method for Low Test-Cost Post-Silicon Tuning. IEICE Transactions 95-A(12): 2292-2300 (2012) |
| j33 | | Masashi Okada, Takao Onoye, Wataru Kobayashi: A Ray Tracing Simulation of Sound Diffraction Based on the Analytic Secondary Source Model. IEEE Transactions on Audio, Speech & Language Processing 20(9): 2448-2460 (2012) |
| j32 | | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Adaptive Performance Compensation With In-Situ Timing Error Predictive Sensors for Subthreshold Circuits. IEEE Trans. VLSI Syst. 20(2): 333-343 (2012) |
| c62 | | Shuta Kimura, Masanori Hashimoto, Takao Onoye: Body bias clustering for low test-cost post-silicon tuning. ASP-DAC 2012: 283-289 |
| c61 | | Toshihiro Kameda, Hiroaki Konoura, Dawood Alnajiar, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye: A predictive delay fault avoidance scheme for coarse-grained reconfigurable architecture. FPL 2012: 615-618 |
| c60 | | Kazuhito Sakomizu, Takashi Nishi, Takao Onoye: A hierarchical motion smoothing for distributed scalable video coding. PCS 2012: 209-212 |
| c59 | | Dawood Alnajiar, Masanori Hashimoto, Takao Onoye, Yukio Mitsuyama: Static voltage over-scaling and dynamic voltage variation tolerance with replica circuits and time redundancy in reconfigurable devices. ReConFig 2012: 1-7 |
| c58 | | Yusuke Hayashi, Yuichi Itoh, Kazuki Takashima, Kazuyuki Fujita, Kosuke Nakajima, Ikuo Daibo, Takao Onoye: Cup-le: A cup-shaped device for conversational experiment. VR 2012: 1-2 |
| 2011 | ||
| j31 | | Kenichi Shinkai, Masanori Hashimoto, Takao Onoye: Extracting Device-Parameter Variations with RO-Based Sensors. IEICE Transactions 94-A(12): 2537-2544 (2011) |
| j30 | | Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye: Stress Probability Computation for Estimating NBTI-Induced Delay Degradation. IEICE Transactions 94-A(12): 2545-2553 (2011) |
| j29 | | Hiroshi Fuketa, Dan Kuroda, Masanori Hashimoto, Takao Onoye: An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion. IEEE Trans. on Circuits and Systems 58-II(5): 299-303 (2011) |
| c57 | | Takehiko Amaki, Masanori Hashimoto, Takao Onoye: Jitter amplifier for oscillator-based true random number generator. ASP-DAC 2011: 81-82 |
| c56 | | Yasumichi Takai, Masanori Hashimoto, Takao Onoye: Power gating implementation for noise mitigation with body-tied triple-well structure. CICC 2011: 1-4 |
| c55 | | Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye: Implications of Reliability Enhancement Achieved by Fault Avoidance on Dynamically Reconfigurable Architectures. FPL 2011: 189-194 |
| c54 | | Takehiko Amaki, Masanori Hashimoto, Takao Onoye: An oscillator-based true random number generator with jitter amplifier. ISCAS 2011: 725-728 |
| c53 | | Toshihiro Kameda, Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye: NBTI Mitigation by Giving Random Scan-in Vectors during Standby Mode. PATMOS 2011: 152-161 |
| 2010 | ||
| j28 | | Kenichi Shinkai, Masanori Hashimoto, Takao Onoye: Prediction of Self-Heating in Short Intra-Block Wires. IEICE Transactions 93-A(3): 583-594 (2010) |
| j27 | | Masashi Okada, Nobuyuki Iwanaga, Tomoya Matsumura, Takao Onoye, Wataru Kobayashi: 3D Sound Rendering for Multiple Sound Sources Based on Fuzzy Clustering. IEICE Transactions 93-A(11): 2163-2172 (2010) |
| j26 | | Ryo Harada, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye: Measurement Circuits for Acquiring SET Pulse Width Distribution with Sub-FO1-Inverter-Delay Resolution. IEICE Transactions 93-A(12): 2417-2423 (2010) |
| j25 | | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Transistor Variability Modeling and its Validation With Ring-Oscillation Frequencies for Body-Biased Subthreshold Circuits. IEEE Trans. VLSI Syst. 18(7): 1118-1129 (2010) |
| c52 | | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Adaptive performance control with embedded timing error predictive sensors for subthreshold circuits. ASP-DAC 2010: 361-362 |
| c51 | | Shinya Abe, Kenichi Shinkai, Masanori Hashimoto, Takao Onoye: Clock skew reduction by self-compensating manufacturing variability with on-chip sensors. ACM Great Lakes Symposium on VLSI 2010: 197-202 |
| c50 | | Hiroaki Konoura, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye: Comparative study on delay degrading estimation due to NBTI with circuit/instance/transistor-level stress probability consideration. ISQED 2010: 646-651 |
| c49 | | Ryo Harada, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye: Measurement circuits for acquiring SET pulsewidth distribution with sub-FO1-inverter-delay resolution. ISQED 2010: 839-844 |
| c48 | | Takehiko Amaki, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: A Design Procedure for Oscillator-Based Hardware Random Number Generator with Stochastic Behavior Modeling. WISA 2010: 107-121 |
| 2009 | ||
| j24 | | Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability. IEICE Transactions 92-C(2): 281-285 (2009) |
| j23 | | Hiroki Sugano, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Hiroyuki Ochi, Yukihiro Nakamura: Efficient Memory Organization Framework for JPEG2000 Entropy Codec. IEICE Transactions 92-A(8): 1970-1977 (2009) |
| j22 | | |
| j21 | | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction. IEICE Transactions 92-A(12): 3094-3102 (2009) |
| c47 | | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Trade-off analysis between timing error rate and power dissipation for adaptive speed control with timing error prediction. ASP-DAC 2009: 266-271 |
| c46 | | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Adaptive performance compensation with in-situ timing error prediction for subthreshold circuits. CICC 2009: 215-218 |
| c45 | | Dawood Alnajiar, Younghun Ko, Takashi Imagawa, Hiroaki Konoura, Masayuki Hiromoto, Yukio Mitsuyama, Masanori Hashimoto, Hiroyuki Ochi, Takao Onoye: Coarse-grained dynamically reconfigurable architecture with flexible reliability. FPL 2009: 186-192 |
| c44 | | Koichi Hamamoto, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits. ISLPED 2009: 51-56 |
| 2008 | ||
| j20 | | Nobuyuki Iwanaga, Tomoya Matsumura, Akihiro Yoshida, Wataru Kobayashi, Takao Onoye: Embedded System Implementation of Sound Localization in Proximal Region. IEICE Transactions 91-A(3): 763-771 (2008) |
| j19 | | Akira Taguchi, Takao Onoye: Special Section on Smart Multimedia & Communication Systems. IEICE Transactions 91-A(10): 2896 (2008) |
| j18 | | Ryoji Hashimoto, Tomoya Matsumura, Yoshihiro Nozato, Kenji Watanabe, Takao Onoye: Implementation of Multi-Agent Object Attention System Based on Biologically Inspired Attractor Selection. IEICE Transactions 91-A(10): 2909-2917 (2008) |
| j17 | | Shinya Abe, Masanori Hashimoto, Takao Onoye: Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution. IEICE Transactions 91-A(12): 3481-3487 (2008) |
| j16 | | Yukio Mitsuyama, Kazuma Takahashi, Rintaro Imai, Masanori Hashimoto, Takao Onoye, Isao Shirakawa: Area-Efficient Reconfigurable Architecture for Media Processing. IEICE Transactions 91-A(12): 3651-3662 (2008) |
| c43 | | Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye: Dynamic supply noise measurement circuit composed of standard cells suitable for in-site SoC power integrity verification. ASP-DAC 2008: 107-108 |
| c42 | | Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Experimental study on body-biasing layout style-- negligible area overhead enables sufficient speed controllability --. ACM Great Lakes Symposium on VLSI 2008: 387-390 |
| c41 | | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye: Correlation verification between transistor variability model with body biasing and ring oscillation frequency in 90nm subthreshold circuits. ISLPED 2008: 3-8 |
| c40 | | Shinya Abe, Masanori Hashimoto, Takao Onoye: Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution. ISQED 2008: 520-525 |
| 2007 | ||
| j15 | | Kosuke Tsujino, Wataru Kobayashi, Takao Onoye, Yukihiro Nakamura: Efficient 3-D Sound Movement with Time-Varying IIR Filters. IEICE Transactions 90-A(3): 618-625 (2007) |
| j14 | | Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye: Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Tradeoff between Wire Cross-Sectional Area and Inductive Crosstalk Effect. IEICE Transactions 90-A(4): 724-731 (2007) |
| j13 | | Kenji Watanabe, Masanao Ise, Takao Onoye, Hiroaki Niwamoto, Ikuo Keshi: An energy-efficient architecture of wireless home network based on MAC broadcast and transmission power control. IEEE Trans. Consumer Electronics 53(1): 124-130 (2007) |
| c39 | | Kenichi Shinkai, Masanori Hashimoto, Takao Onoye: Future Prediction of Self-Heating in Short Intra-Block Wires. ISQED 2007: 660-665 |
| c38 |  | M. N. Bin Mohd Nor, Tomoya Matsumura, Takao Onoye: Direction of arrival estimation improvement of speech on a two-microphone array. SIP 2007: 122-127 |
| 2006 | ||
| j12 | | Gen Fujita, Takaaki Imanaka, Hyunh Van Nhat, Takao Onoye, Isao Shirakawa: Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation. IEICE Transactions 89-A(4): 941-949 (2006) |
| j11 | | Zhaohui Guo, Yuuki Nishikawa, Roberto Y. Omaki, Takao Onoye, Isao Shirakawa: A low-complexity FEC assignment scheme for motion JPEG2000 over wireless network. IEEE Trans. Consumer Electronics 52(1): 81-86 (2006) |
| c37 | | Kyoko Ueda, Atsushi Kosaka, Ryoichi Watanabe, Yoshinori Takeuchi, Takao Onoye, Yuichi Itoh, Yoshifumi Kitamura, Fumio Kishino: m-ActiveCube; Multimedia Extension of Spatial Tangible User Interface. BioADIT 2006: 363-370 |
| c36 | | Kenichi Shinkai, Masanori Hashimoto, Atsushi Kurokawa, Takao Onoye: A gate delay model focusing on current fluctuation over wide-range of process and environmental variability. ICCAD 2006: 47-53 |
| c35 | | Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye: Quantitative Prediction of On-chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward Inductive Crosstalk Free Interconnects. ICCD 2006 |
| c34 | | Jumpei Ashida, Ryusuke Miyamoto, Hiroshi Tsutsui, Takao Onoye, Yukihiro Nakamura: Probabilistic Pedestrian Tracking Based on a Skeleton Model. ICIP 2006: 2825-2828 |
| c33 | | Hiroki Sugano, Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Hiroyuki Ochi, Yukihiro Nakamura: Efficient memory architecture for JPEG2000 entropy codec. ISCAS 2006 |
| 2005 | ||
| j10 | | Yukio Mitsuyama, Motoki Kimura, Takao Onoye, Isao Shirakawa: Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems. IEICE Transactions 88-A(4): 899-906 (2005) |
| j9 | | Kosuke Tsujino, Kazuhiko Furuya, Wataru Kobayashi, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: Design of Realtime 3-D Sound Processing System. IEICE Transactions 88-D(5): 954-962 (2005) |
| j8 | | Atsushi Kosaka, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa: Design of Ogg Vorbis Decoder System for Embedded Platform. IEICE Transactions 88-A(8): 2124-2130 (2005) |
| j7 | | Tomoya Matsumura, Nobuyuki Iwanaga, Wataru Kobayashi, Takao Onoye, Isao Shirakawa: Embedded 3D sound movement system based on feature extraction of head-related transfer function. IEEE Trans. Consumer Electronics 51(1): 262-267 (2005) |
| c32 | | Ryusuke Miyamoto, Hiroaki Sugita, Yoshiteru Hayashi, Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Yukihiro Nakamura: High quality Motion JPEG2000 coding scheme based on the human visual system. ISCAS (3) 2005: 2096-2099 |
| c31 | | Tomoya Matsumura, Nobuyuki Iwanaga, Takao Onoye, Wataru Kobayashi, Isao Shirakawa, Itthichai Arungsrisangchai: 3D sound movement system for embedded applications. ISCAS (5) 2005: 5345-5348 |
| 2004 | ||
| c30 | | Hiroshi Tsutsui, Takahiko Masuzaki, Yoshiteru Hayashi, Yoshitaka Taki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: Scalable Design Framework for JPEG2000 System Architecture. Asia-Pacific Computer Systems Architecture Conference 2004: 296-308 |
| c29 | | Atsushi Kosaka, Satoshi Yamaguchi, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa: SoC design of Ogg Vorbis decoder using embedded processor. Conf. Computing Frontiers 2004: 481-487 |
| c28 | | Hiroaki Sugita, Minh Q. Minh, Takahiko Masuzaki, Hiroshi Tsutsui, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: JPEG2000 high-speed progressive decoding scheme. ISCAS (3) 2004: 873-876 |
| 2003 | ||
| j6 | | Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa: Single DSP Implementation of Realtime 3D Sound Synthesis Algorithm. Journal of Circuits, Systems, and Computers 12(1): 55-74 (2003) |
| c27 | | Kosuke Tsujino, Atsuhito Shigiya, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura, Wataru Kobayashi: A DSP-Based 3-D Sound Synthesis System for Moving Sound Images. GAME-ON 2003: 23- |
| c26 | | Kenji Hontani, Takaaki Imanaka, Gen Fujita, Takao Onoye, Isao Shirakawa: Real-time face object extraction for video phone. ICIP (3) 2003: 873-876 |
| c25 | | S. Komata, A. Pal, Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa: Interactive interface of realtime 3D sound movement for embedded applications. ISCAS (2) 2003: 520-523 |
| c24 | | Yoshiteru Hayashi, Hiroshi Tsutsui, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: Design framework for JPEG2000 encoding system architecture. ISCAS (2) 2003: 740-743 |
| 2002 | ||
| c23 | | Kenji Hontani, Takaaki Imanaka, Gen Fujita, Takao Onoye, Isao Shirakawa: Realtime face object extraction algorithm for video phone. APCCAS (1) 2002: 35-38 |
| c22 | | Hiroshi Tsutsui, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: High speed JPEG2000 encoder by configurable processor. APCCAS (1) 2002: 45-50 |
| c21 | | Nobuyuki Iwanaga, Wataru Kobayashi, Kazuhiko Furuya, Mamoru Sakamoto, Takao Onoye, Isao Shirakawa: Embedded implementation of acoustic field enhancement for stereo headphones. APCCAS (1) 2002: 51-54 |
| c20 | | Hiroshi Tsutsui, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: Adaptive rate control for JPEG2000 image coding in embedded systems. ICIP (3) 2002: 77-80 |
| c19 | | Yoshihiro Uchida, Masanao Ise, Takao Onoye, Isao Shirakawa, Itthichai Arungsrisangchai: VLSI architecture of digital matched filter and prime interleaver for W-CDMA. ISCAS (3) 2002: 269-272 |
| c18 | | Takahiko Masuzaki, Hiroshi Tsutsui, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: JPEG2000 adaptive rate control for embedded systems. ISCAS (4) 2002: 333-336 |
| c17 | | Takao Onoye, Yukihiro Nakamura, Atsuhito Shigiya, Keishi Chikamura, Kosuke Tsujino, Tomonori Izumi, Hirofumi Yamamoto: System-Level Design of IEEE1394 Bus Segment Bridge. ISSS 2002: 74-79 |
| c16 | | T. Kaya, Isao Shirakawa, Ryusuke Miyamoto, Takao Onoye: Design of Embedded System for Video Coding with Logic-Enhanced DRAM and Configurable Process. MTDT 2002 |
| 2001 | ||
| j5 | | Jianping Fan, Jun Yu, Gen Fujita, Takao Onoye, Lide Wu, Isao Shirakawa: Spatiotemporal segmentation for compact video representation. Sig. Proc.: Image Comm. 16(6): 553-566 (2001) |
| c15 | | Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa: A dynamically reconfigurable hardware-based cipher chip. ASP-DAC 2001: 11-12 |
| c14 | | Roberto Y. Omaki, Yu Dong, Morgan Hirosuke Miki, Makoto Furuie, Daisuke Taki, Masaya Tarui, Gen Fujita, Takao Onoye, Isao Shirakawa: Realtime wavelet video coder based on reduced memory accessing. ASP-DAC 2001: 15-16 |
| c13 | | Morgan Hirosuke Miki, Motoki Kimura, Takao Onoye, Isao Shirakawa: High Performance Java Hardware Engine and Software Kernel for Embedded Systems. VLSI-SOC 2001: 109-120 |
| c12 | | Keishi Chikamura, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: IEEE1394 system simulation environment and a design of its link layer controller. ISCAS (5) 2001: 1-4 |
| c11 | | Hiroshi Tsutsui, K. Hiwada, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura: A design of LUT-array-based PLD and a synthesis approach based on sum of generalized complex terms expression. ISCAS (5) 2001: 203-206 |
| c10 | | Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa: VLSI architecture of dynamically reconfigurable hardware-based cipher. ISCAS (4) 2001: 734-737 |
| 2000 | ||
| c9 | | Makoto Furuie, Bao-Yu Song, Yukihiro Yoshida, Takao Onoye, Isao Shirakawa: Layout generation of array cell for NMOS 4-phase dynamic logic (short paper). ASP-DAC 2000: 529-532 |
| c8 | | Yu Dong, Roberto Y. Omaki, Takao Onoye, Isao Shirakawa: VLSI Implementation of a Reduced Memory Bandwidth Realtime EZW Video Coder. ICIP 2000: 126-129 |
| 1999 | ||
| j4 | | Hideyuki Fujishima, Yusuke Takemoto, Takao Onoye, Isao Shirakawa: An architecture of a matrix-vector multiplier dedicated to video decoding and three-dimensional computer graphics. IEEE Trans. Circuits Syst. Video Techn. 9(2): 306-314 (1999) |
| c7 | | Koji Asari, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, Hiroshige Hirano, Toshiyuki Honda, Tatsuo Otsuki, Takaaki Baba, Teresa H. Y. Meng: FeRAM Circuit Technology for System on a Chip. Evolvable Hardware 1999: 193- |
| c6 | | Hideyuki Fujishima, Yusuke Takemoto, T. Yoneda, Takao Onoye, Isao Shirakawa: Hybrid media-processor core for natural and synthetic video decoding. ISCAS (4) 1999: 275-278 |
| c5 | | Morgan Hirosuke Miki, Daisuke Taki, Gen Fujita, Takao Onoye, Isao Shirakawa, Toru Fujiwara, Tadao Kasami: Recursive maximum likelihood decoder for high-speed satellite communication. ISCAS (4) 1999: 572-575 |
| 1998 | ||
| c4 | | Takao Onoye, Gen Fujita, Hiroyuki Okuhata, Morgan Hirosuke Miki, Isao Shirakawa: Low-Power Implementation of H.324 Audiovisual Codec Dedicated to Mobile Computing. ASP-DAC 1998: 589-594 |
| 1997 | ||
| j3 | | Toshihiro Masaki, Yasuhiro Nakatani, Takao Onoye, Koso Murakami: Voice and Telephony Over ATM for Multimedia Network using Shared VCI Cell. Journal of Circuits, Systems, and Computers 7(2): 93-110 (1997) |
| j2 | | Koji Miyanohana, Gen Fujita, Kazuhiro Yanagida, Takao Onoye, Isao Shirakawa: Single Chip Implementation of Encoder-Decoder for Low Bit Rate Visual Communication. Journal of Circuits, Systems, and Computers 7(5): 441-458 (1997) |
| c3 | | Morgan Hirosuke Miki, Gen Fujita, Takao Onoye, Isao Shirakawa: Low-power H.263 video CoDec dedicated to mobile computing. ISLPED 1997: 80-83 |
| c2 | | Yukihiro Yoshida, Bao-Yu Song, Hiroyuki Okuhata, Takao Onoye, Isao Shirakawa: An object code compression approach to embedded processors. ISLPED 1997: 265-268 |
| 1995 | ||
| j1 | | Toshihiro Masaki, Yasuo Morimoto, Takao Onoye, Isao Shirakawa: VLSI implementation of inverse discrete cosine transformer and motion compensator for MPEG2 HDTV video decoding. IEEE Trans. Circuits Syst. Video Techn. 5(5): 387-395 (1995) |
| 1994 | ||
| c1 | | Takayuki Sagishima, Kozo Kimura, Hiroaki Hirata, Tokuzo Kiyohara, Shigeo Asahara, Takao Onoye, Isao Shirakawa: Multi-Threaded Processor for Image Generation. ISCAS 1994: 231-234 |
Colors in the list of coauthors
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