| 2012 | ||
|---|---|---|
| c13 | Roberto R. Osorio, Patricia González: Fast Construction of Nearly-Optimal Prefix Codes without Probability Sorting. DCC 2012: 407 | |
| 2011 | ||
| j4 | Alejandro Nieto, Victor M. Brea, David López Vilariño, Roberto R. Osorio: Performance analysis of massively parallel embedded hardware architectures for retinal image processing. EURASIP J. Image and Video Processing 2011: 10 (2011) | |
| 2009 | ||
| c12 | Roberto R. Osorio, Cesar Diaz-Resco, Javier D. Bruguera: High Performance Image Processing on a Massively Parallel Processor Array. DSD 2009: 233-236 | |
| 2008 | ||
| c11 | Roberto R. Osorio, Javier D. Bruguera: An FPGA architecture for CABAC decoding in manycore systems. ASAP 2008: 293-298 | |
| 2007 | ||
| c10 | Roberto R. Osorio, Javier D. Bruguera: Entropy Coding on a Programmable Processor Array for Multimedia SoC. ASAP 2007: 222-227 | |
| 2006 | ||
| j3 | Roberto R. Osorio, Javier D. Bruguera: High-Throughput Architecture for H.264/AVC CABAC Compression System. IEEE Trans. Circuits Syst. Video Techn. 16(11): 1376-1384 (2006) | |
| c9 | Roberto R. Osorio, Javier D. Bruguera: A Combined Memory Compression And Hierarchical Motion Estimation Architecture For Video Encoding In Embedded Systems. DSD 2006: 269-274 | |
| c8 | Javier D. Bruguera, Roberto R. Osorio: A Unified Architecture for H.264 Multiple Block-Size DCT with Fast and Low Cost Quantization. DSD 2006: 407-414 | |
| 2005 | ||
| c7 | Roberto R. Osorio, Javier D. Bruguera: A New Architecture for fast Arithmetic Coding in H.264 Advanced Video Coder. DSD 2005: 298-305 | |
| 2004 | ||
| j2 | Gauthier Lafruit, Eric Delfosse, Roberto R. Osorio, Wolfgang van Raemdonck, Vissarion Ferentinos: View-dependent, scalable texture streaming in 3-D QoS with MPEG-4 visual texture coding. IEEE Trans. Circuits Syst. Video Techn. 14(7): 1021-1031 (2004) | |
| c6 | Roberto R. Osorio, Javier D. Bruguera: Arithmetic Coding Architecture for H.264/AVC CABAC Compression System. DSD 2004: 62-69 | |
| 2003 | ||
| j1 | Roberto R. Osorio, Bart Vanhoof: High Speed 4-Symbol Arithmetic Encoder Architecture for Embedded Zero Tree-Based Compression. VLSI Signal Processing 33(3): 267-275 (2003) | |
| 2002 | ||
| c5 | Roberto R. Osorio, Sylvain Devillers, Eric Delfosse, Myriam Amielh, Gauthier Lafruit: Bitstream Syntax Description Language for 3D MPEG-4 view-dependent texture streaming. ICIP (3) 2002: 17-20 | |
| 1998 | ||
| c4 | Roberto R. Osorio, Montserrat Bóo, Javier D. Bruguera: Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory. EUROMICRO 1998: 10139- | |
| 1997 | ||
| c3 | Roberto R. Osorio, Javier D. Bruguera: New arithmetic coder/decoder architectures based on pipelining. ASAP 1997: 106-115 | |
| c2 | Mercedes Peón, Roberto R. Osorio, Javier D. Bruguera: A VLSI implementation of an arithmetic coder for image compression. EUROMICRO 1997: 591- | |
| 1995 | ||
| c1 | Roberto R. Osorio, Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata: Digit On-line Large Radix CORDIC Rotator. ASAP 1995: 246-257 | |
Colors in the list of coauthors
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