Hans-Georg Osthof

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	1990
c3		Bernd Becker, Thomas Burch, Günter Hotz, D. Kiel, Reiner Kolla, Paul Molitor, Hans-Georg Osthof, Gisela Pitsch, Uwe Sparmann: A graphical system for hierarchical specifications and checkups of VLSI circuits. EURO-DAC 1990: 174-179
	1989
b1		Reiner Kolla, Paul Molitor, Hans-Georg Osthof: Einführung in den VLSI-Entwurf. Leitfäden und Monographien der Informatik, Teubner 1989, isbn 978-3-519-02273-2, pp. 1-352
	1987
j1		Bernd Becker, Hans-Georg Osthof: Layouts with Wires of Balanced Length. Inf. Comput. 73(1): 45-59 (1987)
c2		Bernd Becker, Günter Hotz, Reiner Kolla, Paul Molitor, Hans-Georg Osthof: Hierarchical Design Based on a Calculus of Nets. DAC 1987: 649-653
	1985
c1		Bernd Becker, Hans-Georg Osthof: Layouts with Wires of Balanced Length. STACS 1985: 21-31

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