| 2012 | ||
|---|---|---|
| c8 | Yongjun Park, Sangwon Seo, Hyunchul Park, Hyoun Kyu Cho, Scott A. Mahlke: SIMD defragmenter: efficient ILP realization on data-parallel architectures. ASPLOS 2012: 363-374 | |
| c7 | Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David Blaauw, Trevor N. Mudge: Process variation in near-threshold wide SIMD architectures. DAC 2012: 980-987 | |
| c6 | Yongjun Park, Jason Jong Kyu Park, Scott A. Mahlke: Efficient performance scaling of future CGRAs for mobile applications. FPT 2012: 335-342 | |
| c5 | Yongjun Park, Jason Jong Kyu Park, Hyunchul Park, Scott A. Mahlke: Libra: Tailoring SIMD Execution Using Heterogeneous Hardware and Dynamic Configurability. MICRO 2012: 84-95 | |
| 2010 | ||
| c4 | Yongjun Park, Hyunchul Park, Scott A. Mahlke, Sukjin Kim: Resource recycling: putting idle resources to work on a composable accelerator. CASES 2010: 21-30 | |
| 2009 | ||
| c3 | Yongjun Park, Hyunchul Park, Scott A. Mahlke: CGRA express: accelerating execution using dynamic operation fusion. CASES 2009: 271-280 | |
| c2 | Hyunchul Park, Yongjun Park, Scott A. Mahlke: Polymorphic pipeline array: a flexible multicore accelerator with virtualized execution for mobile multimedia applications. MICRO 2009: 370-380 | |
| c1 | Hyunchul Park, Yongjun Park, Scott A. Mahlke: A dataflow-centric approach to design low power control paths in CGRAs. SASP 2009: 15-20 | |
| 1 | David Blaauw (David T. Blaauw) | |
| 2 | Chaitali Chakrabarti | |
| 3 | Hyoun Kyu Cho | |
| 4 | Ronald G. Dreslinski | |
| 5 | Sukjin Kim | |
| 6 | Scott A. Mahlke | |
| 7 | Trevor N. Mudge | |
| 8 | Hyunchul Park | |
| 9 | Jason Jong Kyu Park | |
| 10 | Sangwon Seo | |
| 11 | Mark Woh |
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