Sudeep Pasricha

Bobby Dalton Young, Jonathan Apodaca, Luis Diego Briceno, Jay Smith, Sudeep Pasricha, Anthony A. Maciejewski, Howard Jay Siegel, Bhavesh Khemka, Shirish Bahirat, Adrian Ramirez, Yong Zou: Deadline and energy constrained dynamic resource allocation in a heterogeneous computing environment. The Journal of Supercomputing 63(2): 326-347 (2013)

Yong Zou, Yi Xiang, Sudeep Pasricha: Characterizing Vulnerability of Network Interfaces in Embedded Chip Multiprocessors. Embedded Systems Letters 4(2): 41-44 (2012)

Nishit Ashok Kapadia, Sudeep Pasricha: A framework for low power synthesis of interconnection networks-on-chip with multiple voltage islands. Integration 45(3): 271-281 (2012)

Miguel Salas, Sudeep Pasricha: The roce-bush router: a case for routing-centric dimensional decomposition for low-latency 3D noC routers. CODES+ISSS 2012: 171-180

Brad K. Donohoo, Chris Ohlsen, Sudeep Pasricha, Charles Anderson: Exploiting spatiotemporal and device contexts for energy-efficient mobile embedded systems. DAC 2012: 1278-1283

Abdulla Al-Qawasmeh, Sudeep Pasricha, Anthony A. Maciejewski, Howard Jay Siegel: Thermal-Aware Performance Optimization in Power Constrained Heterogenous Data Centers. IPDPS Workshops 2012: 27-40

Shirish Bahirat, Sudeep Pasricha: A Particle Swarm Optimization approach for synthesizing application-specific hybrid photonic networks-on-chip. ISQED 2012: 78-83

Nishit Ashok Kapadia, Sudeep Pasricha: A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip with Multiple Voltage Islands. VLSI Design 2012: 262-267

Sudeep Pasricha: A Framework for TSV Serialization-aware Synthesis of Application Specific 3D Networks-on-Chip. VLSI Design 2012: 268-273

Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt: A Multi-Granularity Power Modeling Methodology for Embedded Processors. IEEE Trans. VLSI Syst. 19(4): 668-681 (2011)

Jonathan Apodaca, Bobby Dalton Young, Luis Diego Briceno, Jay Smith, Sudeep Pasricha, Anthony A. Maciejewski, Howard Jay Siegel, Shirish Bahirat, Bhavesh Khemka, Adrian Ramirez, Yong Zou: Stochastically robust static resource allocation for energy minimization with a makespan constraint in a heterogeneous computing environment. AICCSA 2011: 22-31

Sudeep Pasricha, Shirish Bahirat: OPAL: A multi-layer hybrid photonic NoC for 3D ICs. ASP-DAC 2011: 345-350

Sudeep Pasricha, Yong Zou: NS-FTR: A fault tolerant routing scheme for networks on chip with permanent and runtime intermittent faults. ASP-DAC 2011: 443-448

Nishit Ashok Kapadia, Sudeep Pasricha: VISION: a framework for voltage island aware synthesis of interconnection networks-on-chip. ACM Great Lakes Symposium on VLSI 2011: 31-36

Brad K. Donohoo, Chris Ohlsen, Sudeep Pasricha: AURA: An application and user interaction aware middleware framework for energy optimization in mobile devices. ICCD 2011: 168-174

Yong Zou, Yi Xiang, Sudeep Pasricha: Analysis of on-chip interconnection network interface reliability in multicore systems. ICCD 2011: 427-428

Bobby Dalton Young, Jonathan Apodaca, Luis Diego Briceno, Jay Smith, Sudeep Pasricha, Anthony A. Maciejewski, Howard Jay Siegel, Bhavesh Khemka, Shirish Bahirat, Adrian Ramirez, Yong Zou: Energy-Constrained Dynamic Resource Allocation in a Heterogeneous Computing Environment. ICPP Workshops 2011: 298-307

Soohyun Kwon, Sudeep Pasricha, Jeonghun Cho: POSEIDON: A framework for application-specific Network-on-Chip synthesis for heterogeneous chip multiprocessors. ISQED 2011: 182-188

Sudeep Pasricha, Yong Zou: A low overhead fault tolerant routing scheme for 3D Networks-on-Chip. ISQED 2011: 204-211

Yong Zou, Sudeep Pasricha: NARCO: Neighbor Aware Turn Model-Based Fault Tolerant Routing for NoCs. Embedded Systems Letters 2(3): 85-89 (2010)

Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil D. Dutt: CAPPS: A Framework for Power-Performance Tradeoffs in Bus-Matrix-Based On-Chip Communication Architecture Synthesis. IEEE Trans. VLSI Syst. 18(2): 209-221 (2010)

Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt: Evaluating Carbon Nanotube Global Interconnects for Chip Multiprocessor Applications. IEEE Trans. VLSI Syst. 18(9): 1376-1380 (2010)

Sudeep Pasricha, Yong Zou, Dan Connors, Howard Jay Siegel: OE+IOE: a novel turn model based fault tolerant routing scheme for networks-on-chip. CODES+ISSS 2010: 85-94

Shirish Bahirat, Sudeep Pasricha: UC-PHOTON: A novel hybrid photonic network-on-chip for multiple use-case applications. ISQED 2010: 721-729

Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Minwook Ahn, Yunheung Paek: Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 554-567 (2009)

Gabor Madl, Sudeep Pasricha, Nikil Dutt, Sherif Abdelwahed: Cross-abstraction Functional Verification and Performance Analysis of Chip Multiprocessor Designs. IEEE Trans. Industrial Informatics 5(3): 241-256 (2009)

Sudeep Pasricha, Young-Hwan Park, Nikil D. Dutt, Fadi J. Kurdahi: System-level PVT variation-aware power exploration of on-chip communication architectures. ACM Trans. Design Autom. Electr. Syst. 14(2) (2009)

Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi: Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications. ASP-DAC 2009: 25-30

Shirish Bahirat, Sudeep Pasricha: Exploring hybrid photonic networks-on-chip foremerging chip multiprocessors. CODES+ISSS 2009: 129-136

Sudeep Pasricha: Exploring serial vertical interconnects for 3D ICs. DAC 2009: 581-586

Luis Angel D. Bathen, Yongjin Ahn, Nikil D. Dutt, Sudeep Pasricha: Inter-kernel data reuse and pipelining on chip-multiprocessors for multimedia applications. ESTImedia 2009: 45-54

Luis Angel D. Bathen, Yongjin Ahn, Nikil D. Dutt, Sudeep Pasricha: A Methodology for Power-aware Pipelining via High-Level Performance Model Evaluations. MTV 2009: 19-24

Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi: Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications. VLSI Design 2009: 499-504

Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane: Fast exploration of bus-based communication architectures at the CCATB abstraction. ACM Trans. Embedded Comput. Syst. 7(2) (2008)

Sudeep Pasricha, Nikil Dutt: ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip. ASP-DAC 2008: 789-794

Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil Dutt: Methodology for multi-granularity embedded processor power model generation for an ESL design flow. CODES+ISSS 2008: 255-260

Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum: Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. DAC 2008: 68-71

Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasricha: A framework for memory-aware multimedia application mapping on chip-multiprocessors. ESTImedia 2008: 89-94

Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil Dutt, Yunheung Paek, SunJun Ko: Compiler driven data layout optimization for regular/irregular array access patterns. LCTES 2008: 41-50

Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum: Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors. LCTES 2008: 71-78

Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil Dutt: Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures. VLSI Design 2008: 363-370

Chulho Shin, Peter Grun, Nizar Romdhane, Christopher K. Lennard, Gabor Madl, Sudeep Pasricha, Nikil Dutt, Mark Noll: Enabling heterogeneous cycle-based and event-driven simulation in a design flow integrated using the SPIRIT consortium specifications. Design Autom. for Emb. Sys. 11(2-3): 119-140 (2007)

Sudeep Pasricha, Nikil D. Dutt: A Framework for Cosynthesis of Memory and Communication Architectures for MPSoC. IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 408-420 (2007)

Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1454-1464 (2007)

Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil Dutt: System level power estimation methodology with H.264 decoder prediction IP case study. ICCD 2007: 601-608

Nikil Dutt, Kaustav Banerjee, Luca Benini, Kanishka Lahiri, Sudeep Pasricha: Tutorial 5: SoC Communication Architectures: Technology, Current Practice, Research, and Trends. VLSI Design 2007: 8

Sudeep Pasricha, Nikil D. Dutt, Elaheh Bozorgzadeh, Mohamed Ben-Romdhane: FABSYN: floorplan-aware bus architecture synthesis. IEEE Trans. VLSI Syst. 14(3): 241-253 (2006)

Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: Constraint-driven bus matrix synthesis for MPSoC. ASP-DAC 2006: 30-35

Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil D. Dutt: System-level power-performance trade-offs in bus matrix communication architecture synthesis. CODES+ISSS 2006: 300-305

Sudeep Pasricha, Nikil D. Dutt: COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC. DATE 2006: 700-705

Gabor Madl, Sudeep Pasricha, Luis Angel D. Bathen, Nikil Dutt, Qiang Zhu: Formal performance evaluation of AMBA-based system-on-chip designs. EMSOFT 2006: 311-320

Sudeep Pasricha, Mohamed Ben-Romdhane: Using TLM for Exploring Bus-based SoC Communication Architectures. ASAP 2005: 79-85

Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane: Automated throughput-driven synthesis of bus-based communication architectures. ASP-DAC 2005: 495-498

Sudeep Pasricha, Nikil D. Dutt, Elaheh Bozorgzadeh, Mohamed Ben-Romdhane: Floorplan-aware automated synthesis of bus-based communication architectures. DAC 2005: 565-570

Sudeep Pasricha, Manev Luthra, Shivajit Mohapatra, Nikil D. Dutt, Nalini Venkatasubramanian: Dynamic Backlight Adaptation for Low-Power Handheld Devices. IEEE Design & Test of Computers 21(5): 398-405 (2004)

Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: Fast exploration of bus-based on-chip communication architectures. CODES+ISSS 2004: 242-247

Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: Extending the transaction level modeling approach for fast communication architecture exploration. DAC 2004: 113-118

Sudeep Pasricha, Shivajit Mohapatra, Manev Luthra, Nikil D. Dutt, Nalini Venkatasubramanian: Reducing Backlight Power Consumption for Streaming Video Applications on Mobile Handheld Devices. ESTImedia 2003: 11-17

Sudeep Pasricha, Alexander V. Veidenbaum: Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches. ICCD 2003: 526-531