| 2009 | ||
|---|---|---|
| p2 | Luciano Lavagno, Claudio Passerone: Design of Embedded Systems. Embedded Systems Design and Verification 2009: 2 | |
| 2007 | ||
| c23 | Dante Del Corso, Claudio Passerone, Leonardo Maria Reyneri, Claudio Sansoè, Marco Borri, Stefano Speretta, Maurizio Tranchero: Architecture of a Small Low-Cost Satellite. DSD 2007: 428-431 | |
| 2006 | ||
| c22 | Claudio Passerone: Real time operating system modeling in a system level design environment. ISCAS 2006 | |
| 2005 | ||
| j6 | Alberto La Rosa, Luciano Lavagno, Claudio Passerone: Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems. IEEE Design & Test of Computers 22(1): 28-38 (2005) | |
| j5 | Alberto La Rosa, Luciano Lavagno, Claudio Passerone: Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform. IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 100-106 (2005) | |
| j4 | Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe: Quasi-static scheduling of independent tasks for reactive systems. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1492-1514 (2005) | |
| p1 | Luciano Lavagno, Claudio Passerone: Design of Embedded Systems. The Industrial Information Technology Handbook 2005: 1-14 | |
| c21 | Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe: A Time Slice Based Scheduler Model for System Level Design. DATE 2005: 378-383 | |
| 2004 | ||
| c20 | Alberto La Rosa, Claudio Passerone, Francesco Gregoretti, Luciano Lavagno: Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform. DATE 2004: 1218-1223 | |
| c19 | Ivan Blunno, Guy Alain Narboni, Claudio Passerone: An Automated Methodology for Low Electro-Magnetic Emissions Digital Circuits Design. DSD 2004: 540-547 | |
| 2003 | ||
| j3 | Felice Balarin, Yosinori Watanabe, Harry Hsieh, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli: Metropolis: An Integrated Electronic System Design Environment. IEEE Computer 36(4): 45-52 (2003) | |
| c18 | Alberto La Rosa, Luciano Lavagno, Claudio Passerone: Hardware/Software Design Space Exploration for a Reconfigurable Processor. DATE 2003: 10570-10575 | |
| c17 | Fabio Campi, Andrea Cappelli, Roberto Guerrieri, Andrea Lodi, Mario Toma, Alberto La Rosa, Luciano Lavagno, Claudio Passerone, Roberto Canegallo: A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems. IPDPS 2003: 171 | |
| 2002 | ||
| c16 | Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Yosinori Watanabe: Modeling and Designing Heterogeneous Systems. Concurrency and Hardware Design 2002: 228-273 | |
| c15 | Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe: Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. ICATPN 2002: 80-100 | |
| c14 | Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Guang Yang: Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model. CODES 2002: 13-18 | |
| c13 | G. Arrigoni, L. Duchini, Claudio Passerone, Luciano Lavagno, Yosinori Watanabe: False Path Elimination in Quasi-Static Scheduling. DATE 2002: 964-970 | |
| c12 | Felice Balarin, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe: Processes, Interfaces and Platforms. Embedded Software Modeling in Metropolis. EMSOFT 2002: 407-416 | |
| c11 | Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer, Sergio Nocco, Claudio Passerone, Gianpiero Cabodi: A Symbolic Approach for the Combined Solution of Scheduling and Allocation. ISSS 2002: 237-242 | |
| 2001 | ||
| c10 | Alberto La Rosa, Luciano Lavagno, Claudio Passerone: A software development tool chain for a reconfigurable processor. CASES 2001: 93-98 | |
| c9 | Claudio Passerone, Yosinori Watanabe, Luciano Lavagno: Generation of minimal size code for scheduling graphs. DATE 2001: 668-673 | |
| 2000 | ||
| j2 | Tullio Cuatto, Claudio Passerone, Claudio Sansoè, Francesco Gregoretti, Attila Jurecska, Alberto L. Sangiovanni-Vincentelli: A Case Study in Embedded Systems Design: An Engine Control Unit. Design Autom. for Emb. Sys. 6(1): 71-88 (2000) | |
| c8 | Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli: Task generation and compile-time scheduling for mixed data-control embedded software. DAC 2000: 489-494 | |
| 1999 | ||
| c7 | H. J. H. N. Kenter, Claudio Passerone, W. J. M. Smits, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli: Designing digital video systems: modeling and scheduling. CODES 1999: 64-68 | |
| c6 | Gianpiero Cabodi, Paolo Camurati, Claudio Passerone, Stefano Quer: Computing Timed Transition Relations for Sequential Cycle-Based Simulation. DATE 1999: 8-12 | |
| 1998 | ||
| j1 | Claudio Passerone, Claudio Sansoè, Luciano Lavagno, Patrick C. McGeer, Jonathan Martin, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli: Modeling reactive systems in Java. ACM Trans. Design Autom. Electr. Syst. 3(4): 515-523 (1998) | |
| c5 | Claudio Passerone, Roberto Passerone, Claudio Sansoè, Jonathan Martin, Alberto L. Sangiovanni-Vincentelli, Rick McGeer: Modeling reactive systems in Java. CODES 1998: 15-19 | |
| c4 | Tullio Cuatto, Claudio Passerone, Luciano Lavagno, Attila Jurecska, Antonino Damiano, Claudio Sansoè, Alberto L. Sangiovanni-Vincentelli: A Case Study in Embedded System Design: An Engine Control Unit. DAC 1998: 804-807 | |
| 1997 | ||
| c3 | Claudio Passerone, Luciano Lavagno, Claudio Sansoè, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli: Trade-off evaluation in embedded system design via co-simulation. ASP-DAC 1997: 291-297 | |
| c2 | Claudio Passerone, Luciano Lavagno, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli: Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis. DAC 1997: 389-394 | |
| 1995 | ||
| c1 | Francesco Gregoretti, Claudio Passerone: Using a massively parallel architecture for integrated circuits testing. PDP 1995: 332-338 | |
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