Cameron Patterson

Alexander D. Rast, Javier Navaridas, Xin Jin, Francesco Galluppi, Luis A. Plana, José Miguel-Alonso, Cameron Patterson, Mikel Luján, Steve Furber: Managing Burstiness and Scalability in Event-Driven Models on the SpiNNaker Neuromimetic System. International Journal of Parallel Programming 40(6): 553-582 (2012)

Cameron Patterson, Jim D. Garside, Eustace Painkras, Steve Temple, Luis A. Plana, Javier Navaridas, Thomas Sharp, Steve Furber: Scalable communications for a million-core neural processing architecture. J. Parallel Distrib. Comput. 72(11): 1507-1520 (2012)

Eustace Painkras, Luis A. Plana, Jim D. Garside, Steve Temple, Simon Davidson, Jeffrey Pepper, David M. Clark, Cameron Patterson, Steve Furber: SpiNNaker: A multi-core System-on-Chip for massively-parallel neural net simulation. CICC 2012: 1-4

Cameron Patterson, Thomas Preston, Francesco Galluppi, Steve Furber: Managing a Massively-Parallel Resource-Constrained Computing Architecture. DSD 2012: 723-726

Cameron Patterson, Francesco Galluppi, Alexander D. Rast, Steve Furber: Visualising large-scale neural network models in real-time. IJCNN 2012: 1-8

Alexander D. Rast, Francesco Galluppi, Sergio Davies, Luis A. Plana, Cameron Patterson, Thomas Sharp, David R. Lester, Steve Furber: Concurrent heterogeneous neural model simulation on real-time neuromimetic hardware. Neural Networks 24(9): 961-978 (2011)

Mukaram M. Khan, Alexander D. Rast, Javier Navaridas, X. Jin, Luis A. Plana, Mikel Luján, Steve Temple, Cameron Patterson, D. Richards, John V. Woods, José Miguel-Alonso, Stephen B. Furber: Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric. Parallel Computing 37(8): 392-409 (2011)

Thomas Sharp, Cameron Patterson, Steve Furber: Distributed configuration of massively-parallel simulation on SpiNNaker neuromorphic hardware. IJCNN 2011: 1099-1105

Alexander D. Rast, Xin Jin, Francesco Galluppi, Luis A. Plana, Cameron Patterson, Stephen B. Furber: Scalable event-driven native parallel processing: the SpiNNaker neuromimetic system. Conf. Computing Frontiers 2010: 21-30

Xin Jin, Francesco Galluppi, Cameron Patterson, Alexander D. Rast, Sergio Davies, Steve Temple, Steve Furber: Algorithm and software for simulation of spiking neural networks on the multi-chip SpiNNaker system. IJCNN 2010: 1-8

Cameron Patterson: A Dynamic Module Server for Embedded Platform FPGAs. Engineering of Reconfigurable Systems and Algorithms 2003: 31-40

Cameron Patterson, Steven A. Guccione: JBits™ Design Abstractions. FCCM 2001: 251-252

Scott McMillan, Cameron Patterson: JBits^TM Implementations of the Advanced Encryption Standard (Rijndael). FPL 2001: 162-171

Tim Price, Cameron Patterson: Reconfigurable Breakpoints for Co-debug. FPL 2001: 473-482

Cameron Patterson: A Dynamic FPGA Implementation of the Serpent Block Cipher. CHES 2000: 141-155

Cameron Patterson: High Performance DES Encryption in Virtex(tm) FPGAs Using Jbits(tm). FCCM 2000: 113-121

James Hwang, Cameron Patterson, Sujoy Mitra: VHDL Placement Directives for Parametric IP Blocks. FCCM 1999: 284-285

James Hwang, Cameron Patterson, Sujoy Mitra: Hierarchical Placement Directives for Parametric IP Blocks. FPGA 1999: 250

James Hwang, Cameron Patterson, S. Mohan, Eric Dellinger, Sujoy Mitra, Ralph Wittig: Generating Layouts for Self-implementing Modules. FPL 1998: 525-529