Pierre G. Paulin

Claude Helmstetter, Sylvain Basset, Romain Lemaire, Fabien Clermidy, Pascal Vivet, Michel Langevin, Chuck Pilkington, Pierre G. Paulin, Didier Fuin: A dynamic stream link for efficient data flow control in NoC based heterogeneous MPSoC. ASP-DAC 2013: 41-46

Youcef Bouchebaba, Ali Erdem Özcan, Pierre G. Paulin, Gabriela Nicolescu: MpAssign: a framework for solving the many-core platform mapping problem. Softw., Pract. Exper. 42(7): 891-915 (2012)

Bruno Girodias, Luiza Gheorghe Iugan, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin, Pierre G. Paulin: Integrating Memory Optimization with Mapping Algorithms for Multi-Processors System-on-Chip. ACM Trans. Embedded Comput. Syst. 11(3): 64 (2012)

Pierre G. Paulin: Programming challenges & solutions for multi-processor SoCs: an industrial perspective. DAC 2011: 262-267

Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology. DATE 2011: 788-793

Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: Multi-Optical Network-on-Chip for Large Scale MPSoC. Embedded Systems Letters 2(3): 77-80 (2010)

Sébastien Le Beux, Guy Bois, Gabriela Nicolescu, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin: Combining mapping and partitioning exploration for NoC-based embedded systems. Journal of Systems Architecture - Embedded Systems Design 56(7): 223-232 (2010)

Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin: A system-level exploration flow for optica network on chip (ONoC) in 3D MPSoC. ISCAS 2010: 3613-3616

Youcef Bouchebaba, Pierre G. Paulin, Ali Erdem Özcan, Bruno Lavigueur, Michel Langevin, Olivier Benny, Gabriela Nicolescu: MpAssign: A framework for solving the many-core platform mapping problem. International Symposium on Rapid System Prototyping 2010: 1-7

Bruno Girodias, Luiza Gheorghe, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin, Pierre G. Paulin: Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip. International Symposium on Rapid System Prototyping 2010: 1-9

Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur: Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications. Signal Processing Systems 57(2): 263-283 (2009)

Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin: Optimizing Configuration and Application Mapping for MPSoC Architectures. AHS 2009: 474-481

Simon Schliecker, Mircea Negrean, Gabriela Nicolescu, Pierre G. Paulin, Rolf Ernst: Reliable performance analysis of a multicore multithreaded system-on-chip. CODES+ISSS 2008: 161-166

Eshel Haritan, Toshihiro Hattori, Hiroyuki Yagi, Pierre G. Paulin, Wayne Wolf, Achim Nohl, Drew Wingard, Mike Muller: Multicore design is the challenge! what is the solution? DAC 2008: 128-130

Andrew B. Kahng, Ira Chayut, John M. Cohn, Toshihiro Hattori, Jeong-Taek Kong, Pierre G. Paulin, Rich Tobias: Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs. IEEE Design & Test of Computers 24(1): 83-93 (2007)

Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne Wolf: Roundtable: Envisioning the Future for Multiprocessor SoC. IEEE Design & Test of Computers 24(2): 174-183 (2007)

Youcef Bouchebaba, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid, Bruno Lavigueur, Pierre G. Paulin: MPSoC memory optimization using program transformation. ACM Trans. Design Autom. Electr. Syst. 12(4) (2007)

Youcef Bouchebaba, Essaid Bensoudane, Bruno Lavigueur, Pierre G. Paulin, Gabriela Nicolescu: Two-level tiling for MPSoC architecture. ASAP 2007: 314-319

Laura Pozzi, Pierre G. Paulin: A future of customizable processors: are we there yet? DATE 2007: 1224-1225

Youcef Bouchebaba, Bruno Lavigueur, Bruno Girodias, Gabriela Nicolescu, Pierre G. Paulin: MPSoC memory optimization for digital camera applications. DSD 2007: 424-427

Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Damien Lyonnard, Olivier Benny, Bruno Lavigueur, David Lo, Giovanni Beltrame, V. Gagne, Gabriela Nicolescu: Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia. IEEE Trans. VLSI Syst. 14(7): 667-680 (2006)

Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Olivier Benny, Damien Lyonnard, Bruno Lavigueur, David Lo: Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems. DATE 2006: 482-487

Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur: Application-Level Memory Optimization for MPSoC. IEEE International Workshop on Rapid System Prototyping 2006: 169-178

Giovanni Beltrame, Donatella Sciuto, Cristina Silvano, Pierre G. Paulin, Essaid Bensoudane: An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures. VLSI-SoC 2006: 146-151

Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Gabriela Nicolescu: Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management. CODES+ISSS 2004: 48-53

Francine Bacchini, Pierre G. Paulin, Reinaldo A. Bergamaschi, Raj Pawate, Arie Bernstein, Ramesh Chandra, Mohamed Ben-Romdhane: System level design: six success stories in search of an industry. DAC 2004: 349-350

Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane, Michel Langevin, Damien Lyonnard: Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding. DATE 2004: 58-63

Pierre G. Paulin: DATE Panel: Chips of the Future: Soft, Crunchy or Hard? DATE 2004: 844-851

Pierre G. Paulin: Automatic Mapping of Parallel Applications onto Multi-Processor Platforms: A Multimedia Application. DSD 2004: 2-4

Pierre G. Paulin: Designing High Quality, Scaleable SoC??s with Heterogeneous Components. ISQED 2004: 325

Philippe Magarshack, Pierre G. Paulin: System-on-chip beyond the nanometer wall. DAC 2003: 419-424

Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane: Network Processing Challenges and an Experimental NPU Platform. DATE 2003: 20064-20069

Pierre G. Paulin, Miguel Santana: FlexWare: A Retargetable Embedded-Software Development Environment. IEEE Design & Test of Computers 19(4): 59-69 (2002)

Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane: StepNP: A System-Level Exploration Platform for Network Processors. IEEE Design & Test of Computers 19(6): 17-26 (2002)

Vassilios Gerousis, Oz Levia, Pierre G. Paulin, Mark Pinto, Chris Rowen, Gabriele Saucier: Who Owns the Platform? DATE 2002: 238

Pierre G. Paulin, Faraydon Karim, Paul Bromley: Network processors: a perspective on market requirements, processor architectures and embedded S/W tools. DATE 2001: 420-429

Pierre G. Paulin: Embedded systems technologies for application-specific architecture platforms. ISSS 2001: 195

Ahmed Amine Jerraya, Pierre G. Paulin, Richard Norman, Feliks J. Welfeld: Programming models for network processors (Panel). ISSS 2001: 202

Rolf Ernst, Grant Martin, Oz Levia, Pierre G. Paulin, Stamatis Vassiliadis, Kees A. Vissers: The Future of Flexible HW Platform Architectures Panel Discussion. DATE 2000: 634

Pierre G. Paulin: Towards Application-Specific Architecture Platforms: Embedded Systems Design Automation Technologies. EUROMICRO 2000: 1028-

Carlos A. Valderrama, François Naçabal, Pierre G. Paulin, Ahmed Amine Jerraya: Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples. Design Autom. for Emb. Sys. 3(2-3): 199-217 (1998)

Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: Compilation Methods for the Address Calculation Units of Embedded Processor Systems. Design Autom. for Emb. Sys. 2(1): 61-77 (1997)

Clifford Liem, François Naçabal, Carlos A. Valderrama, Pierre G. Paulin, Ahmed Amine Jerraya: System-on-a-Chip Cosimulation and Compilation. IEEE Design & Test of Computers 14(2): 16-25 (1997)

Clifford Liem, Marco Cornero, Miguel Santana, Pierre G. Paulin, Ahmed Amine Jerraya, Jean-Marc Gentit, Jean Lopez, Xavier Figari, Laurent Bergher: Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor. DAC 1997: 780-785

Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: ReCode: the design and re-design of the instruction codes for embedded instruction-set processors. ED&TC 1997: 612

Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures. DAC 1996: 597-600

Pierre G. Paulin, Clifford Liem, Trevor C. May, Shailesh Sutarwala: DSP design tool requirements for embedded systems: A telecommunications industrial perspective. VLSI Signal Processing 9(1-2): 23-47 (1995)

Pierre G. Paulin, Jean Fréhel, Michel Harrand, Elisabeth Berrebi, Clifford Liem, François Naçabal, Jean-Claude Herluison: High-level synthesis and codesign methods: an application to a videophone codec. EURO-DAC 1995: 444-451

Clifford Liem, Pierre G. Paulin, Marco Cornero, Ahmed Amine Jerraya: Industrial experience using rule-driven retargetable code generation for multimedia applications. ISSS 1995: 60-68

Pierre G. Paulin, Farhad Mavaddat (Eds.): Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), September 13-15, 1995, Cannes, France. ACM 1995, isbn 0-89791-771-5

Shailesh Sutarwala, Pierre G. Paulin: Flexible modeling environment for embedded systems design. CODES 1994: 124-130

Pierre G. Paulin, Clifford Liem, Trevor C. May, Shailesh Sutarwala: Flexware: A flexible firmware development environment for embedded systems. Code Generation for Embedded Processors 1994: 67-84

Clifford Liem, Trevor C. May, Pierre G. Paulin: Instruction-Set Matching and Selection for DSP and ASIP Code Generation. EDAC-ETC-EUROASIC 1994: 31-37

Clifford Liem, Trevor C. May, Pierre G. Paulin: Register assignment through resource classification for ASIP microcode generation. ICCAD 1994: 397-402

Shailesh Sutarwala, Pierre G. Paulin, Yatish Kumar: Insulin: An Instruction Set Simulation Environment. CHDL 1993: 369-376

Ahmed Amine Jerraya, Pierre G. Paulin, Simon Curry: Meta VHDL for Higher Level Controller Modeling and Synthesis. VLSI 1991: 215-224

Pierre G. Paulin, John P. Knight: Force-directed scheduling for the behavioral synthesis of ASICs. IEEE Trans. on CAD of Integrated Circuits and Systems 8(6): 661-679 (1989)

Pierre G. Paulin, John P. Knight: Scheduling and Binding Algorithms for High-Level Synthesis. DAC 1989: 1-6

Pierre G. Paulin: Horizontal Partitioning of PLA-based Finite State Machines. DAC 1989: 333-338

Pierre G. Paulin, John P. Knight: Force-Directed Scheduling in Automatic Data Path Synthesis. DAC 1987: 195-202

Pierre G. Paulin, John P. Knight, Emil F. Girczyc: HAL: a multi-paradigm approach to automatic data path synthesis. DAC 1986: 263-270