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Gerardo Pelosi
2010 – today
- 2013
[j5]Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi: A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA. Journal of Systems and Software 86(7): 1864-1878 (2013)- [c27]Giovanni Agosta, Alessandro Barenghi, Massimo Maggi, Gerardo Pelosi: Compiler-based side channel vulnerability analysis and optimized countermeasures application. DAC 2013: 81
- 2012
- [c26]Giovanni Agosta, Alessandro Barenghi, Gerardo Pelosi: Exploiting Bit-level Parallelism in GPGPUs: a Case Study on KeeLoq Exhaustive Search Attacks. ARCS Workshops 2012: 385-396
- [c25]Giovanni Agosta, Alessandro Barenghi, Gerardo Pelosi: A code morphing methodology to automate power analysis countermeasures. DAC 2012: 77-82
- [c24]Giovanni Agosta, Alessandro Barenghi, Antonio Parata, Gerardo Pelosi: Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution. ITNG 2012: 189-194
- 2011
- [c23]Alessandro Barenghi, Gerardo Pelosi: Security and Privacy in Smart Grid Infrastructures. DEXA Workshops 2011: 102-108
- [c22]Sabrina De Capitani di Vimercati, Sara Foresti, Stefano Paraboschi, Gerardo Pelosi, Pierangela Samarati: Supporting Concurrency in Private Data Outsourcing. ESORICS 2011: 648-664
- [c21]Sabrina De Capitani di Vimercati, Sara Foresti, Stefano Paraboschi, Gerardo Pelosi, Pierangela Samarati: Efficient and Private Access to Outsourced Data. ICDCS 2011: 710-719
- [c20]Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi, Andrea Palomba: Fault attack to the elliptic curve digital signature algorithm with multiple bit faults. SIN 2011: 63-72
- [c19]Alessandro Barenghi, Gerardo Pelosi, Yannick Teglia: Information Leakage Discovery Techniques to Enhance Secure Chip Design. WISTP 2011: 128-143
- [r2]Gerardo Pelosi: Secure Audit Logs. Encyclopedia of Cryptography and Security (2nd Ed.) 2011: 1097-1099
- [r1]
- 2010
- [c18]Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi: Fault attack on AES with single-bit induced faults. IAS 2010: 167-172
- [c17]Alessandro Barenghi, Luca Breveglieri, Israel Koren, Gerardo Pelosi, Francesco Regazzoni: Countermeasures against fault attacks on software implemented AES: effectiveness and cost. WESS 2010: 7
- [c16]Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi: Low Voltage Fault Attacks to AES. HOST 2010: 7-12
- [c15]Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Gerardo Pelosi, Pierangela Samarati: Encryption-Based Policy Enforcement for Cloud Storage. ICDCS Workshops 2010: 42-51
- [c14]Giovanni Agosta, Alessandro Barenghi, Fabrizio De Santis, Gerardo Pelosi: Record Setting Software Implementation of DES Using CUDA. ITNG 2010: 748-755
- [c13]Gerardo Pelosi, Giuseppe Psaila: SMaC: spatial map caching technique for mobile devices. SAC 2010: 1829-1830
- [c12]Alessandro Barenghi, Gerardo Pelosi, Yannick Teglia: Improving first order differential power attacks through digital signal processing. SIN 2010: 124-133
- [i2]Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi: Low Voltage Fault Attacks to AES and RSA on General Purpose Processors. IACR Cryptology ePrint Archive 2010: 130 (2010)
2000 – 2009
- 2009
- [j4]Giovanni Agosta, Francesco Bruschi, Gerardo Pelosi, Donatella Sciuto: A Transform-Parametric Approach to Boolean Matching. IEEE Trans. on CAD of Integrated Circuits and Systems 28(6): 805-817 (2009)
- [c11]Alessandro Barenghi, Guido Bertoni, Emanuele Parrinello, Gerardo Pelosi: Low Voltage Fault Attacks on the RSA Cryptosystem. FDTC 2009: 23-31
- [c10]Andrea Di Biagio, Alessandro Barenghi, Giovanni Agosta, Gerardo Pelosi: Design of a parallel AES for graphics hardware using the CUDA framework. IPDPS 2009: 1-8
- [c9]Giovanni Agosta, Alessandro Barenghi, Fabrizio De Santis, Andrea Di Biagio, Gerardo Pelosi: Fast Disk Encryption through GPGPU Acceleration. PDCAT 2009: 102-109
- 2008
- [j3]Guido Marco Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi: Parallel Hardware Architectures for the Cryptographic Tate Pairing. I. J. Network Security 7(1): 31-37 (2008)
- [j2]Guido Bertoni, Luca Breveglieri, Liqun Chen, Pasqualina Fragneto, Keith A. Harrison, Gerardo Pelosi: A pairing SW implementation for Smart-Cards. Journal of Systems and Software 81(7): 1240-1247 (2008)
- [c8]Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Gerardo Pelosi: A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp. ITNG 2008: 112-119
- [c7]Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Gerardo Pelosi, Pierangela Samarati: Preserving confidentiality of security policies in data outsourcing. WPES 2008: 75-84
- 2007
- [j1]Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Martino Sykora: Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications. JCP 2(9): 50-59 (2007)
- [c6]Giovanni Agosta, Francesco Bruschi, Gerardo Pelosi, Donatella Sciuto: A Unified Approach to Canonical Form-based Boolean Matching. DAC 2007: 841-846
- [c5]
- [c4]Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Israel Koren: Countermeasures against Branch Target Buffer Attacks. FDTC 2007: 75-79
- [c3]Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Martino Sykora: Programming Highly Parallel Reconfigurable Architectures for Public-Key Cryptographic Applications. ITNG 2007: 3-10
- 2006
- [c2]Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi, L. Sportiello: Software implementation of Tate pairing over GF(2m). DATE Designers' Forum 2006: 7-11
- [c1]Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi: Parallel Hardware Architectures for the Cryptographic Tate Pairing. ITNG 2006: 186-191
- [i1]Giovanni Agosta, Gerardo Pelosi: Countermeasures for the Simple Branch Prediction Analysis. IACR Cryptology ePrint Archive 2006: 482 (2006)
Coauthor Index
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last updated on 2013-05-30 21:55 CEST by the dblp team