Lu Peng

Lide Duan, Lu Peng, Bin Li: Predicting Architectural Vulnerability on Multithreaded Processors under Resource Contention and Sharing. IEEE Trans. Dependable Sec. Comput. 10(2): 114-127 (2013)

Qingzhao Yu, Bin Li, Zhide Fang, Lu Peng: Model guided adaptive design and analysis in computer experiment. Statistical Analysis and Data Mining 5(5): 399-409 (2012)

Ying Zhang, Lide Duan, Bin Li, Lu Peng: Optimal microarchitectural design configuration selection for processor hard-error reliability. ISQED 2012: 91-96

Gang Liu, Zhuo Huang, Jih-Kwon Peir, Xudong Shi, Lu Peng: Enhancements for Accurate and Timely Streaming Prefetcher. J. Instruction-Level Parallelism 13 (2011)

Santhosh Verma, David M. Koppelman, Lu Peng: Efficient Prefetching with Hybrid Schemes and Use of Program Feedback to Adjust Prefetcher Aggressiveness. J. Instruction-Level Parallelism 13 (2011)

Jianmin Chen, Bin Li, Ying Zhang, Lu Peng, Jih-Kwon Peir: Statistical GPU power analysis using tree-based methods. IGCC 2011: 1-6

Jianmin Chen, Bin Li, Ying Zhang, Lu Peng, Jih-Kwon Peir: Tree structured analysis on GPU power study. ICCD 2011: 57-64

Lide Duan, Lu Peng, Bin Li: Two-level soft error vulnerability prediction on SMT/CMP architectures. IISWC 2011: 78

Ying Zhang, Lu Peng, Bin Li, Jih-Kwon Peir, Jianmin Chen: Architecture comparisons between Nvidia and ATI GPUs: Computation parallelism and data communications. IISWC 2011: 205-215

Lide Duan, Ying Zhang, Bin Li, Lu Peng: Universal rules guided design parameter selection for soft error resilient processors. ISPASS 2011: 247-256

Ying Zhang, Yue Hu, Bin Li, Lu Peng: Performance and Power Analysis of ATI GPU: A Statistical Approach. NAS 2011: 149-158

Ying Zhang, Lu Peng, Wencheng Lu, Lide Duan, Suresh Rai: Expediating IP lookups with reduced power via TBM and SST supernode caching. Computer Communications 33(3): 390-397 (2010)

Ran Tao, Li Yang, Lu Peng, Bin Li: A Host-Based Intrusion Detection System Using Architectural Features to Improve Sophisticated Denial-of-Service Attack Detections. IJISP 4(1): 18-31 (2010)

Bin Li, Lide Duan, Lu Peng: Efficient Microarchitectural Vulnerabilities Prediction Using Boosted Regression Trees and Patient Rule Inductions. IEEE Trans. Computers 59(5): 593-607 (2010)

Jianmin Chen, Zhuo Huang, Feiqi Su, Jih-Kwon Peir, Jeff Ho, Lu Peng: Weak execution ordering - exploiting iterative methods on many-core GPUs. ISPASS 2010: 154-163

Bin Li, Lu Peng, Balachandran Ramadass: Accurate and efficient processor performance prediction via regression tree based modeling. Journal of Systems Architecture - Embedded Systems Design 55(10-12): 457-467 (2009)

Lide Duan, Bin Li, Lu Peng: Versatile prediction and fast estimation of Architectural Vulnerability Factor from processor performance metrics. HPCA 2009: 129-140

Li Yang, Lu Peng, Balachandran Ramadass: SecCMP: Enhancing Critical Secrets Protection in Chip-Multiprocessors. IJISP 2(4): 54-66 (2008)

Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Carl Staelin, Yen-Kuang Chen, David M. Koppelman: Memory hierarchy performance measurement of commercial dual-core desktop processors. Journal of Systems Architecture - Embedded Systems Design 54(8): 816-828 (2008)

Bin Li, Lu Peng, Balachandran Ramadass: Efficient mart-aided modeling for microarchitecture design space exploration and performance prediction. SIGMETRICS 2008: 439-440

Lu Peng, Wencheng Lu, Lide Duan: Power Efficient IP Lookup with Supernode Caching. GLOBECOM 2007: 215-219

Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-Kuang Chen, David M. Koppelman: Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study. IPCCC 2007: 55-64

Li Yang, Lu Peng: SecCMP: a secure chip-multiprocessor architecture. ASID 2006: 72-76

Xudong Shi, Zhen Yang, Jih-Kwon Peir, Lu Peng, Yen-Kuang Chen, Victor W. Lee, B. Liang: Coterminous locality and coterminous group data prefetching on chip-multiprocessors. IPDPS 2006

Lu Peng, Jih-Kwon Peir, Konrad Lai: A New Address-Free Memory Hierarchy Layer for Zero-Cycle Load. J. Instruction-Level Parallelism 6 (2004)

Lu Peng, Jih-Kwon Peir, Konrad Lai: Signature Buffer: Bridging Performance Gap between Registers and Caches. HPCA 2004: 164-175

Lu Peng, Jih-Kwon Peir, Qianrong Ma, Konrad Lai: Address-free memory access based on program syntax correlation of loads and stores. IEEE Trans. VLSI Syst. 11(3): 314-324 (2003)

Qianrong Ma, Jih-Kwon Peir, Lu Peng, Konrad Lai: Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores. ICCD 2001: 54-61

Qiuming Zhu, Lu Peng: A new approach to conic section approximation of object boundaries. Image Vision Comput. 17(9): 645-658 (1999)