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Gianluca Piccinini
2010 – today
- 2012
[j10]Azzurra Pulimeno, Mariagrazia Graziano, Gianluca Piccinini: UDSM Trends Comparison: From Technology Roadmap to UltraSparc Niagara2. IEEE Trans. VLSI Syst. 20(7): 1341-1346 (2012)- 2010
- [j9]Maurizio Martina, Guido Masera, Gianluca Piccinini: Scalable low-complexity B-spline discrete wavelet transform architecture. IET Circuits, Devices & Systems 4(2): 159-167 (2010)
2000 – 2009
- 2008
- [j8]Mariagrazia Graziano, Gianluca Piccinini: Statistical power supply dynamic noise prediction in hierarchical power grid and package networks. Integration 41(4): 524-538 (2008)
- 2004
- [j7]Mariagrazia Graziano, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. Microelectronics Journal 35(10): 849-857 (2004)
- [j6]Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: An electromigration and thermal model of power wires for a priori high-level reliability prediction. IEEE Trans. VLSI Syst. 12(4): 349-358 (2004)
- 2003
- [j5]Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Coupled electro-thermal modeling and optimization of clock networks. Microelectronics Journal 34(12): 1175-1185 (2003)
- [j4]Maurizio Martina, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations. VLSI Signal Processing 35(2): 137-153 (2003)
- [c15]Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni: Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. FPGA 2003: 246
- [c14]Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Effects of Temperature in Deep-Submicron Global Interconnect Optimization. PATMOS 2003: 90-100
- [c13]M. Addino, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. PATMOS 2003: 121-130
- 2002
- [j3]Guido Masera, M. Mazza, Gianluca Piccinini, F. Viglione, Maurizio Zamboni: Architectural strategies for low-power VLSI turbo decoders. IEEE Trans. VLSI Syst. 10(3): 279-285 (2002)
- [c12]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni: Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. FPL 2002: 332-339
- [c11]Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni: Reconfigurable DSP IP for multimedia applications. ICASSP 2002: 4179
- [c10]Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, M. M. Prono, Maurizio Zamboni: Clock Distribution Network Optimization under Self-Heating and Timing Constraints. PATMOS 2002: 198-208
- 2001
- [c9]Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Synthesis of low-leakage PD-SOI circuits with body-biasing. ISLPED 2001: 287-290
- [c8]Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Hierarchical power supply noise evaluation for early power grid design prediction. SLIP 2001: 183-188
- [c7]Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Switching Noise Analysis Framework For High Speed Logic Families. VLSI Design 2001: 524-530
- 2000
- [c6]F. Viglione, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni: A 50 Mbit/s Iterative Turbo-Decoder. DATE 2000: 176-180
- [c5]Mariagrazia Graziano, Marco Delaurenti, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Noise Safety Design Methodologies. ISQED 2000: 157-
1990 – 1999
- 1999
- [j2]Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni: VLSI architectures for turbo codes. IEEE Trans. VLSI Syst. 7(3): 369-379 (1999)
- [c4]Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni: A Quantitative Approach to the Design of an Optimized Hardware Interpreter for Java Byte-Code. Applied Informatics 1999: 51-54
- [c3]Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni: New 2 Gbit/s CMOS I/O pads. Great Lakes Symposium on VLSI 1999: 82-85
- 1998
- [c2]Pasquale Cocchini, Massoud Pedram, Gianluca Piccinini, Maurizio Zamboni: Fanout optimization under a submicron transistor-level delay model. ICCAD 1998: 551-556
- 1992
- [j1]Guido Albertengo, Pierluigi Civera, Renato Lo Cigno, Gianluca Piccinini, Maurizio Zamboni, Flaminio Borgonovo, Luigi Fratta, Giuseppe Panizzardi: Deflection network: Principles, implementation, services. European Transactions on Telecommunications 3(2): 195-206 (1992)
1980 – 1989
- 1987
- [c1]Pierluigi Civera, F. Maddaleno, Gianluca Piccinini, Maurizio Zamboni: An Experimental VLSI Prolog Interpreter: Preliminary Measurements and Results. ISCA 1987: 117-126
Coauthor Index
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last updated on 2013-05-06 20:47 CEST by the dblp team